[llvm-bugs] [Bug 38225] New: [X86] Improve pass FixupLEA, and enable it on btver2.

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=38225

            Bug ID: 38225
           Summary: [X86] Improve pass FixupLEA, and enable it on btver2.
           Product: new-bugs
           Version: unspecified
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: andrea.dibiagio at gmail.com
                CC: llvm-bugs at lists.llvm.org

Three-operands LEA instructions are slow on btver2 too. So we should enable 
FixupLEAPass for btver2.

On Btver2, a LEA with a `Scale` != 1 is always slow.
We should teach the FixupLEAPass how to process those slow instructions too.
In particular - using the same notation in FixupLEAPass - we should
`processInstructionsForBtver()`. Currently, we only
`processInstructionsForSLM()`.

The core logic in method `processInstrForSlow3OpLEA()` is good for btver2.
The only Intel specific portion of that code is related to the call to helper
function `hasInefficientLEABaseReg()`.
We should slightly restructure that logic, so that it makes sense for AMD
processors too.

The bottom line is:
we should try to slightly restructure the code in FixupLEAPass, so that the
pass can be enable on more subtargets. It would definitely help improving the
codegen for btver2. I think it would also be beneficial to other AMD processors
which may suffer for the same problematic LEA.

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20180719/99e45a4d/attachment-0001.html>