[llvm-bugs] [Bug 36444] New: MOVQ involving XMM registers rejected by verifier

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https://bugs.llvm.org/show_bug.cgi?id=36444

            Bug ID: 36444
           Summary: MOVQ involving XMM registers rejected by verifier
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: kavon.farvardin at gmail.com
                CC: llvm-bugs at lists.llvm.org

Created attachment 19909
  --> https://bugs.llvm.org/attachment.cgi?id=19909&action=edit
MIR test case that produces the error.

According to the Intel instruction manual, on x86-64, we can use movq with xmm
registers in the following ways:

MOVQ xmm1, xmm2/m64   (Move quadword from xmm2/mem64 to xmm1.)

MOVQ xmm2/m64, xmm1   (Move quadword from xmm1 to xmm2/mem64.)


However, such instructions are rejected by the MachineFunction verifier. I have
attached a MIR test case that reproduces this failure on ToT. 

I'm not aware of a way to trigger this bug with LLVM IR, since I think
instruction selection uses a different instruction for such moves, since these
movq's seem to have a complex instruction encoding, but are valid instructions.

------------
➤ llc -mtriple=x86_64-- fail.mir 

# Machine code for function foo: IsSSA, NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: %rdi

%bb.0: derived from LLVM BB %entry
    Live Ins: %rdi
        %xmm2 = MOV64rm %rdi, 1, %noreg, 0, %noreg
        MOV64mr %rdi, 1, %noreg, 0, %noreg, %xmm2
        RETQ %rdi

# End machine code for function foo.

*** Bad machine code: Illegal physical register for instruction ***
- function:    foo
- basic block: %bb.0 entry (0x7fbaef84ba78)
- instruction: %xmm2 = MOV64rm
- operand 0:   %xmm2
%xmm2 is not a GR64 register.

*** Bad machine code: Illegal physical register for instruction ***
- function:    foo
- basic block: %bb.0 entry (0x7fbaef84ba78)
- instruction: MOV64mr
- operand 5:   %xmm2
%xmm2 is not a GR64 register.
LLVM ERROR: Found 2 machine code errors.

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