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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - MOVQ involving XMM registers rejected by verifier"
href="https://bugs.llvm.org/show_bug.cgi?id=36444">36444</a>
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<th>Summary</th>
<td>MOVQ involving XMM registers rejected by verifier
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>All
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
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<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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</tr>
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<th>Reporter</th>
<td>kavon.farvardin@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
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<div>
<pre>Created <span class=""><a href="attachment.cgi?id=19909" name="attach_19909" title="MIR test case that produces the error.">attachment 19909</a> <a href="attachment.cgi?id=19909&action=edit" title="MIR test case that produces the error.">[details]</a></span>
MIR test case that produces the error.
According to the Intel instruction manual, on x86-64, we can use movq with xmm
registers in the following ways:
MOVQ xmm1, xmm2/m64 (Move quadword from xmm2/mem64 to xmm1.)
MOVQ xmm2/m64, xmm1 (Move quadword from xmm1 to xmm2/mem64.)
However, such instructions are rejected by the MachineFunction verifier. I have
attached a MIR test case that reproduces this failure on ToT.
I'm not aware of a way to trigger this bug with LLVM IR, since I think
instruction selection uses a different instruction for such moves, since these
movq's seem to have a complex instruction encoding, but are valid instructions.
------------
➤ llc -mtriple=x86_64-- fail.mir
# Machine code for function foo: IsSSA, NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: %rdi
%bb.0: derived from LLVM BB %entry
Live Ins: %rdi
%xmm2 = MOV64rm %rdi, 1, %noreg, 0, %noreg
MOV64mr %rdi, 1, %noreg, 0, %noreg, %xmm2
RETQ %rdi
# End machine code for function foo.
*** Bad machine code: Illegal physical register for instruction ***
- function: foo
- basic block: %bb.0 entry (0x7fbaef84ba78)
- instruction: %xmm2 = MOV64rm
- operand 0: %xmm2
%xmm2 is not a GR64 register.
*** Bad machine code: Illegal physical register for instruction ***
- function: foo
- basic block: %bb.0 entry (0x7fbaef84ba78)
- instruction: MOV64mr
- operand 5: %xmm2
%xmm2 is not a GR64 register.
LLVM ERROR: Found 2 machine code errors.
------------</pre>
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