[llvm-bugs] [Bug 35090] New: SREM/UREM can now be legal

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35090

            Bug ID: 35090
           Summary: SREM/UREM can now be legal
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: PowerPC
          Assignee: unassignedbugs at nondot.org
          Reporter: hfinkel at anl.gov
                CC: jtony at ca.ibm.com, llvm-bugs at lists.llvm.org,
                    powerllvm at ca.ibm.com

In lib/Target/PowerPC/PPCISelLowering.cpp, we have this:

  // PowerPC has no SREM/UREM instructions unless we are on P9
  // On P9 we may use a hardware instruction to compute the remainder.
  // The instructions are not legalized directly because in the cases where the
  // result of both the remainder and the division is required it is more
  // efficient to compute the remainder from the result of the division rather
  // than use the remainder instruction.
  if (Subtarget.isISA3_0()) {
    setOperationAction(ISD::SREM, MVT::i32, Custom);
    setOperationAction(ISD::UREM, MVT::i32, Custom);
    setOperationAction(ISD::SREM, MVT::i64, Custom);
    setOperationAction(ISD::UREM, MVT::i64, Custom);
  } else {
    setOperationAction(ISD::SREM, MVT::i32, Expand);
    setOperationAction(ISD::UREM, MVT::i32, Expand);
    setOperationAction(ISD::SREM, MVT::i64, Expand);
    setOperationAction(ISD::UREM, MVT::i64, Expand);
  }

but as of:

  [llvm] r312862 - [DivRempairs] add a pass to optimize div/rem pairs (PR31028)

the rationale for using custom lowering here should no longer be true. At the
IR level, we perform the transformation where the remainder is computed from
the result of the division when both a required. We should now be able to lower
these directly.

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