[llvm-bugs] [Bug 35313] New: Enhancement: Implement MOV32 #imm on arm.
via llvm-bugs
llvm-bugs at lists.llvm.org
Tue Nov 14 18:32:44 PST 2017
https://bugs.llvm.org/show_bug.cgi?id=35313
Bug ID: 35313
Summary: Enhancement: Implement MOV32 #imm on arm.
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: ARM
Assignee: unassignedbugs at nondot.org
Reporter: codeman.consulting at gmail.com
CC: llvm-bugs at lists.llvm.org
The ARM documents list MOV32 as an alias for MOVW/MOVT which accepts a 32 bit
immediate. Since this is supported by the arm assembler, it seems reasonable
(and relatively easy) to support it on this end. We get the bonus of more
readable MOVW/MOVT loads of addresses and users get simpler assembly. It
looks like AArch64 does something like this already with the 4 instruction 64
bit MOV grouping.
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