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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Enhancement: Implement MOV32 #imm on arm."
href="https://bugs.llvm.org/show_bug.cgi?id=35313">35313</a>
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<th>Summary</th>
<td>Enhancement: Implement MOV32 #imm on arm.
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: ARM
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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</tr>
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<th>Reporter</th>
<td>codeman.consulting@gmail.com
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<p>
<div>
<pre>The ARM documents list MOV32 as an alias for MOVW/MOVT which accepts a 32 bit
immediate. Since this is supported by the arm assembler, it seems reasonable
(and relatively easy) to support it on this end. We get the bonus of more
readable MOVW/MOVT loads of addresses and users get simpler assembly. It
looks like AArch64 does something like this already with the 4 instruction 64
bit MOV grouping.</pre>
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