[llvm-bugs] [Bug 32326] New: [X86] Better scheduling/selection of the LEA instruction

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=32326

            Bug ID: 32326
           Summary: [X86] Better scheduling/selection of the LEA
                    instruction
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: andrew.v.tischenko at gmail.com,
                    llvm-bugs at lists.llvm.org, spatel+llvm at rotateright.com
            Blocks: 32325

Some basic forms of the LEA instruction (2 source operands, no scale etc.) can
typically be performed on the cpu's generic ALUs whilst the complex forms (3
source operands, scale + offset etc.) can only be performed on a cpus's AGUs.

We need to better tag the different LEA instructions so that we can
discriminate in the scheduler model and compare them against other memory
address instructions.

We should then be able to improve LEA pattern selection in the machine combiner
(balance ALU/AGU usage, use multi stage LEAs for simple integer multiplies
etc.).


Referenced Bugs:

https://bugs.llvm.org/show_bug.cgi?id=32325
[Bug 32325] [META][X86] Improve implementation and use of X86 scheduler models
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