[llvm-bugs] [Bug 33629] New: [mc][gfx9] Missing support for 16-bit renamed/legacy VALU opcodes

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https://bugs.llvm.org/show_bug.cgi?id=33629

            Bug ID: 33629
           Summary: [mc][gfx9] Missing support for 16-bit renamed/legacy
                    VALU opcodes
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: dpreobrazhensky at luxoft.com
                CC: llvm-bugs at lists.llvm.org

There are several opcodes changed in gfx9:

    - v_mad_f16
    - v_mad_i16
    - v_mad_u16
    - v_fma_f16
    - v_div_fixup_f16
    - v_interp_p2_f16

These opcodes have different semantics and encoding than their gfx8
counterparts. To preserve binary compatibility with gfx8, there is also a bunch
of new 'legacy' opcodes which have gfx8 encoding and semantics:

    - v_mad_legacy_f16
    - v_mad_legacy_u16
    - v_mad_legacy_i16
    - v_fma_legacy_f16
    - v_div_fixup_legacy_f16
    - v_interp_p2_legacy_f16

Current implementation supports only legacy opcodes with old names (without
'legacy' suffix). This is a complete mess. Assembler should support both legacy
and new opcodes with clearer names.

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