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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [mc][gfx9] Missing support for 16-bit renamed/legacy VALU opcodes"
href="https://bugs.llvm.org/show_bug.cgi?id=33629">33629</a>
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<th>Summary</th>
<td>[mc][gfx9] Missing support for 16-bit renamed/legacy VALU opcodes
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
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</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>There are several opcodes changed in gfx9:
- v_mad_f16
- v_mad_i16
- v_mad_u16
- v_fma_f16
- v_div_fixup_f16
- v_interp_p2_f16
These opcodes have different semantics and encoding than their gfx8
counterparts. To preserve binary compatibility with gfx8, there is also a bunch
of new 'legacy' opcodes which have gfx8 encoding and semantics:
- v_mad_legacy_f16
- v_mad_legacy_u16
- v_mad_legacy_i16
- v_fma_legacy_f16
- v_div_fixup_legacy_f16
- v_interp_p2_legacy_f16
Current implementation supports only legacy opcodes with old names (without
'legacy' suffix). This is a complete mess. Assembler should support both legacy
and new opcodes with clearer names.</pre>
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