[llvm-bugs] [Bug 33595] New: [mc][gfx9] V_MAD_MIX* opcodes should support op_sel/op_sel_hi

via llvm-bugs llvm-bugs at lists.llvm.org
Mon Jun 26 10:11:18 PDT 2017


            Bug ID: 33595
           Summary: [mc][gfx9] V_MAD_MIX* opcodes should support
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: dpreobrazhensky at luxoft.com
                CC: llvm-bugs at lists.llvm.org

According with AMD doc, V_MAD_MIX* opcodes use op_sel and op_sel_hi bits to
select either 32-bit or 16-bit src. See Gfx9_Fp16_Enhancement#3_20161209AT.pdf
for details.

Current implementation hardcodes op_sel_hi=[0,0,0] for using 32-bit src
operands. op_sel modifiers are not supported.

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