[llvm-bugs] [Bug 35784] New: [meta][x86] Scheduler Driven Optimizations

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35784

            Bug ID: 35784
           Summary: [meta][x86] Scheduler Driven Optimizations
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: andrea.dibiagio at gmail.com,
                    andrew.v.tischenko at gmail.com, craig.topper at gmail.com,
                    gadi.haber at intel.com, llvm-bugs at lists.llvm.org,
                    spatel+llvm at rotateright.com, zvi.rackover at intel.com
            Blocks: 32325

Split off from Bug #26183.

With the scheduler models maturing we should be investigating ways to better
select between MC optimizations based on scheduler characteristics, register
pressure etc.

Bug #26183 mentioned several X86 slow/fast features that could be replaced with
scheduler costings:

FeatureSlowBTMem
FeatureSlowSHLD
FeatureSlowUAMem16
FeatureSlowUAMem32
FeatureSlowDivide32
FeatureSlowDivide64

Some of these affect (older) CPUs that currently don't have a accurate
scheduler models - taking numbers from Agner is probably enough to be useful?

Additionally, the use of when to combine multiple shuffles to a single variable
shuffle mask keeps coming up. As well as the actual instruction cost, the cost
of loading the mask needs to be accurately modelled: register pressure? can it
be hoisted? etc.


Referenced Bugs:

https://bugs.llvm.org/show_bug.cgi?id=32325
[Bug 32325] [META][X86] Improve implementation and use of X86 scheduler models
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