[llvm-bugs] [Bug 32487] New: [X86] Account for domain crossing penalties in the scheduling of SSE/AVX instructions

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=32487

            Bug ID: 32487
           Summary: [X86] Account for domain crossing penalties in the
                    scheduling of SSE/AVX instructions
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: llvm-bugs at lists.llvm.org
            Blocks: 32325

X86 domain crossing penalties are a lot more complicated than we account for,
each CPUs treat instructions from the same domain quite differently. We should
be trying to better model this to allow instruction selection to better tune
for particular CPUs.


Referenced Bugs:

https://bugs.llvm.org/show_bug.cgi?id=32325
[Bug 32325] [META][X86] Improve implementation and use of X86 scheduler models
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