[llvm-bugs] [Bug 30913] New: [X86] Scalar FMA nodes derived from FMA instrinics should not fold FNEG into the operand that has upper bits preserved.

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https://llvm.org/bugs/show_bug.cgi?id=30913

            Bug ID: 30913
           Summary: [X86] Scalar FMA nodes derived from FMA instrinics
                    should not fold FNEG into the operand that has upper
                    bits preserved.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: craig.topper at gmail.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

Scalar AVX-512 FMA intrinsics create 128-bit X86ISD::FMADD_RND nodes. FMADD_RND
nodes have a target specific DAG combine that trys to combine them with FNEG
nodes to create FNMADD_RND/FNSUB_RND/FSUB_RND nodes. Scalar FMA intrinsics
always have an input node that passes its upper bits straight through the
output register. If this input comes from a 128-bit FNEG, we should not combine
the FNEG because the resulting node would not have the semantics of modifying
the upper bits like the FNEG implied.

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