<html>
<head>
<base href="https://llvm.org/bugs/" />
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [X86] Scalar FMA nodes derived from FMA instrinics should not fold FNEG into the operand that has upper bits preserved."
href="https://llvm.org/bugs/show_bug.cgi?id=30913">30913</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[X86] Scalar FMA nodes derived from FMA instrinics should not fold FNEG into the operand that has upper bits preserved.
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>craig.topper@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Scalar AVX-512 FMA intrinsics create 128-bit X86ISD::FMADD_RND nodes. FMADD_RND
nodes have a target specific DAG combine that trys to combine them with FNEG
nodes to create FNMADD_RND/FNSUB_RND/FSUB_RND nodes. Scalar FMA intrinsics
always have an input node that passes its upper bits straight through the
output register. If this input comes from a 128-bit FNEG, we should not combine
the FNEG because the resulting node would not have the semantics of modifying
the upper bits like the FNEG implied.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>