[llvm-bugs] [Bug 28573] New: [X86] AMD Jaguar scheduler doesn't correctly model 256-bit AVX instructions

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https://llvm.org/bugs/show_bug.cgi?id=28573

            Bug ID: 28573
           Summary: [X86] AMD Jaguar scheduler doesn't correctly model
                    256-bit AVX instructions
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: chisophugis at gmail.com, filcab at gmail.com,
                    llvm-bugs at lists.llvm.org, simon.f.whittaker at gmail.com,
                    spatel+llvm at rotateright.com
    Classification: Unclassified

All current AMD CPUs capable of AVX 'double pump' 256-bit vector operations
through 128-bit vector ALUs.

On Jaguar this means while the latency is typically (but not always) the same
for a xmm and ymm variants, the throughput is half what is predicted by the
scheduler/cost-models. This needs to be accounted for.

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