[llvm-bugs] [Bug 31451] New: AVX-512: Shuffle from <16 x i32> to <4 x i32> should be optimized

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=31451

            Bug ID: 31451
           Summary: AVX-512: Shuffle from <16 x i32> to <4 x i32> should
                    be optimized
           Product: libraries
           Version: trunk
          Hardware: All
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: elena.demikhovsky at intel.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

define <4 x i32> @foo(<16 x i32> %v) {
  %strided.vec = shufflevector <16 x i32> %v, <16 x i32> undef, <4 x i32> <i32
0, i32 4, i32 8, i32 12>
  ret <4 x i32>%strided.vec
}
This shuffle requires 1 instruction on AVX-512.
The output of llc:
        vextracti32x4   $1, %zmm0, %xmm1
        vmovd   %xmm1, %eax
        vpinsrd $1, %eax, %xmm0, %xmm1
        vextracti32x4   $2, %zmm0, %xmm2
        vmovd   %xmm2, %eax
        vpinsrd $2, %eax, %xmm1, %xmm1
        vextracti32x4   $3, %zmm0, %xmm0
        vmovd   %xmm0, %eax
        vpinsrd $3, %eax, %xmm1, %xmm0

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