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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - AVX-512: Shuffle from <16 x i32> to <4 x i32> should be optimized"
href="https://llvm.org/bugs/show_bug.cgi?id=31451">31451</a>
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<th>Summary</th>
<td>AVX-512: Shuffle from <16 x i32> to <4 x i32> should be optimized
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>All
</td>
</tr>
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<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>elena.demikhovsky@intel.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>define <4 x i32> @foo(<16 x i32> %v) {
%strided.vec = shufflevector <16 x i32> %v, <16 x i32> undef, <4 x i32> <i32
0, i32 4, i32 8, i32 12>
ret <4 x i32>%strided.vec
}
This shuffle requires 1 instruction on AVX-512.
The output of llc:
vextracti32x4 $1, %zmm0, %xmm1
vmovd %xmm1, %eax
vpinsrd $1, %eax, %xmm0, %xmm1
vextracti32x4 $2, %zmm0, %xmm2
vmovd %xmm2, %eax
vpinsrd $2, %eax, %xmm1, %xmm1
vextracti32x4 $3, %zmm0, %xmm0
vmovd %xmm0, %eax
vpinsrd $3, %eax, %xmm1, %xmm0</pre>
</div>
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