[llvm-bugs] [Bug 25526] New: AArch64 atomic operations disrupted by fast-regalloc

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=25526

            Bug ID: 25526
           Summary: AArch64 atomic operations disrupted by fast-regalloc
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: AArch64
          Assignee: unassignedbugs at nondot.org
          Reporter: t.p.northover at gmail.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

When compiling this at -O0:

    define {i64, i1} @foo(i64* %addr, i64 %desired, i64 %new) {
      %old = cmpxchg i64* %addr, i64 %desired, i64 %new seq_cst seq_cst
      ret {i64, i1} %old
    }

Fast-regalloc seems to insert many spills between the ldaxr and the stlxr. If
these are on the same cache-line as %addr (in practice) then they can reset the
monitor causing the operation to fail.

ARM is almost certainly affected too. But both only at -O0.

I'm still not sure what to do about this one. Some obvious options are:

1. Go back to lots of pseudo-instructions for various different uses. Extremely
nasty, we worked very hard to get rid of those for better codegen.
2. Disable fast-regalloc in all cases. Probably bad for debug quality, so I
doubt this is viable.
3. Emit libcalls at -O0. I'm not sure all platforms support these though, we'd
have to make sure they're available.

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