[LLVMbugs] [Bug 24191] New: Possibly inefficient std::atomic<int> codegen on x86 for simple arithmetic
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Mon Jul 20 15:07:12 PDT 2015
https://llvm.org/bugs/show_bug.cgi?id=24191
Bug ID: 24191
Summary: Possibly inefficient std::atomic<int> codegen on x86
for simple arithmetic
Product: clang
Version: 3.7
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: LLVM Codegen
Assignee: unassignedclangbugs at nondot.org
Reporter: tkoeppe at google.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
[I also reported this issue to GCC:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66881]
Consider these two simple versions of addition:
#include <atomic>
std::atomic<int> x;
int y;
void f(int a) {
x.store(x.load(std::memory_order_relaxed) + a, std::memory_order_relaxed);
}
void g(int a) {
y += a;
}
Clang generates the following assembly (https://goo.gl/IWtwkr):
f(int): # @f(int)
mov eax, dword ptr [rip + x]
add eax, edi
mov dword ptr [rip + x], eax
ret
g(int): # @g(int)
add dword ptr [rip + y], edi
ret
Now, it is clear to me that the correct atomic codegen for store() and load()
is "mov", as it appears here, but why aren't the two consecutive operations not
folded into a single add? Aren't the semantics and the memory ordering the
same? x86 says that (most) "reads" and "writes" are strongly ordered; doesn't
that apply to the read and write produced by "add", too?
(My original motivation came from a variant of this with floats, where the
non-atomic code executed noticeably faster, even though I would have expected
the two to produce the same machine code.)
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