[LLVMbugs] [Bug 18532] New: Multiplication of a float vector by -1 should be transformed to an XOR of sign bits.

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Sat Jan 18 06:58:17 PST 2014


http://llvm.org/bugs/show_bug.cgi?id=18532

            Bug ID: 18532
           Summary: Multiplication of a float vector by -1 should be
                    transformed to an XOR of sign bits.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: nick at indigorenderer.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

According to http://software.intel.com/sites/landingpage/IntrinsicsGuide/ ,
_mm_mul_ps has a latency of 4 or 5 cycles, and mm_xor_ps has a latency of 1
cycle.
Therefore, when multiplying a float vector by -1, it's probably a good idea to
turn the multiplication into an XOR of the sign bits.

Multiplying a vector by -1 is quite common in 3D vector maths when negating
vectors.

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