[LLVMbugs] [Bug 18397] New: MipsAsmBackend.cpp adjustFixupValue() miscomputes some fixups for big-endian MIPS

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=18397

            Bug ID: 18397
           Summary: MipsAsmBackend.cpp adjustFixupValue() miscomputes some
                    fixups for big-endian MIPS
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: FreeBSD
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: emaste at freebsd.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

I observed invalid lengths in .debug_aranges output on big endian MIPS, SVN
r194575 + local changes.  Lengths appeared shifted left by 32 (from readelf
-w):

    Address            Length
    0x0000000120006eb0 0x1e5c00000000

It turns out MipsAsmBackend.cpp::adjustFixupValue() handles a rather inadequate
set of fixup widths:

     unsigned FullSize;

     switch ((unsigned)Kind) {
     case Mips::fixup_Mips_16:
       FullSize = 2;
       break;
     case Mips::fixup_Mips_64:
       FullSize = 8;
       break;
     default:
       FullSize = 4;
       break;
     }

so the 64-bit length field (FK_Data_8) gets only 4 bytes.

I'll attach a patch shortly.

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