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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - MipsAsmBackend.cpp adjustFixupValue() miscomputes some fixups for big-endian MIPS"
href="http://llvm.org/bugs/show_bug.cgi?id=18397">18397</a>
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<th>Summary</th>
<td>MipsAsmBackend.cpp adjustFixupValue() miscomputes some fixups for big-endian MIPS
</td>
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<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>FreeBSD
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>emaste@freebsd.org
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>I observed invalid lengths in .debug_aranges output on big endian MIPS, SVN
r194575 + local changes. Lengths appeared shifted left by 32 (from readelf
-w):
Address Length
0x0000000120006eb0 0x1e5c00000000
It turns out MipsAsmBackend.cpp::adjustFixupValue() handles a rather inadequate
set of fixup widths:
unsigned FullSize;
switch ((unsigned)Kind) {
case Mips::fixup_Mips_16:
FullSize = 2;
break;
case Mips::fixup_Mips_64:
FullSize = 8;
break;
default:
FullSize = 4;
break;
}
so the 64-bit length field (FK_Data_8) gets only 4 bytes.
I'll attach a patch shortly.</pre>
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