[LLVMbugs] [Bug 19008] New: Alias Analysis error while enable useAA(), and will leads to a wrong schedule in post ra scheduler

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=19008

            Bug ID: 19008
           Summary: Alias Analysis error while enable useAA(), and will
                    leads to a wrong schedule in post ra scheduler
           Product: new-bugs
           Version: 3.4
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: leeyr338 at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

Created attachment 12169
  --> http://llvm.org/bugs/attachment.cgi?id=12169&action=edit
test case for the bug

Using the following command to compile the test case in attachment, it can get
all dumps after each pass.
"llc -mtriple=powerpc64 -mcpu=e5500 -pre-RA-sched=source -O2 error-sched.ll -o
s.ppc -print-after-all &> after_all.ppc_test"

  At the very beginning, the NO.9 instruction should be "PartialAlias" with the
NO.1~8 instructions.
  if.end28:                                         ; preds = %for.end
  1 store i16 -26198, i16* %arrayidx, align 16, !tbaa !1
  2 store i16 30600, i16* %arrayidx2, align 2, !tbaa !1
  3 store i16 -2, i16* %arrayidx4, align 4, !tbaa !1
  4 store i16 -1, i16* %arrayidx6, align 2, !tbaa !1
  5 store i16 -1, i16* %arrayidx8, align 8, !tbaa !1
  6 store i16 32767, i16* %arrayidx10, align 2, !tbaa !1
  7 store i16 0, i16* %arrayidx12, align 4, !tbaa !1
  8 store i16 -32768, i16* %arrayidx14, align 2, !tbaa !1
  9 %4 = load ppc_fp128* %vecalign, align 16, !tbaa !5
  10 %5 = fadd ppc_fp128 %4, %4
  11 store ppc_fp128 %5, ppc_fp128* %vecalign15, align 16, !tbaa !5
  12 br label %for.body51

  But, After CGP, the IR is translated to something like:
  BB#4:
    ...
    1 %sunkaddr = ptrto %union.VR_union uu_buf to i64
    2 %sunkaddr23 = add i64 %sunkaddr, 2
    3 %sunkaddr24 = inttoptr i64 %sunkaddr23, align 2
    4 store i16 1234, i16* %sunkaddr24, align 2
    ...
    5 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128
    6 %data = load ppc_fp128* %vecalign, align 16
    ...

  The Alias Analysis will return "NoAlias" for the NO.6 instruction and No.4
instruction (but it should be PartialAlias). Alias Analysis stop analysising on
instruction NO.3, because %sunkaddr24 is not a pointer! 
  So, when the post-ra scheduler got "NoAlias" infomation, it would schedule
instruction like:
    BB#4:
    ...
    1 %sunkaddr = ptrto %union.VR_union uu_buf to i64
    2 %sunkaddr23 = add i64 %sunkaddr, 2

    ; Error schedule the load instruction to this location
    6 %data = load ppc_fp128* %vecalign, align 16 
    3 %sunkaddr24 = inttoptr i64 %sunkaddr23, align 2
    4 store i16 1234, i16* %sunkaddr24, align 2
    ...
    5 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128
    ...

  Obviously, this is a wrong schedule.

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20140228/abd34a84/attachment.html>