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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Alias Analysis error while enable useAA(), and will leads to a wrong schedule in post ra scheduler"
href="http://llvm.org/bugs/show_bug.cgi?id=19008">19008</a>
</td>
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<th>Summary</th>
<td>Alias Analysis error while enable useAA(), and will leads to a wrong schedule in post ra scheduler
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
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<th>Version</th>
<td>3.4
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>new bugs
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>leeyr338@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=12169" name="attach_12169" title="test case for the bug">attachment 12169</a> <a href="attachment.cgi?id=12169&action=edit" title="test case for the bug">[details]</a></span>
test case for the bug
Using the following command to compile the test case in attachment, it can get
all dumps after each pass.
"llc -mtriple=powerpc64 -mcpu=e5500 -pre-RA-sched=source -O2 error-sched.ll -o
s.ppc -print-after-all &> after_all.ppc_test"
At the very beginning, the NO.9 instruction should be "PartialAlias" with the
NO.1~8 instructions.
if.end28: ; preds = %for.end
1 store i16 -26198, i16* %arrayidx, align 16, !tbaa !1
2 store i16 30600, i16* %arrayidx2, align 2, !tbaa !1
3 store i16 -2, i16* %arrayidx4, align 4, !tbaa !1
4 store i16 -1, i16* %arrayidx6, align 2, !tbaa !1
5 store i16 -1, i16* %arrayidx8, align 8, !tbaa !1
6 store i16 32767, i16* %arrayidx10, align 2, !tbaa !1
7 store i16 0, i16* %arrayidx12, align 4, !tbaa !1
8 store i16 -32768, i16* %arrayidx14, align 2, !tbaa !1
9 %4 = load ppc_fp128* %vecalign, align 16, !tbaa !5
10 %5 = fadd ppc_fp128 %4, %4
11 store ppc_fp128 %5, ppc_fp128* %vecalign15, align 16, !tbaa !5
12 br label %for.body51
But, After CGP, the IR is translated to something like:
BB#4:
...
1 %sunkaddr = ptrto %union.VR_union uu_buf to i64
2 %sunkaddr23 = add i64 %sunkaddr, 2
3 %sunkaddr24 = inttoptr i64 %sunkaddr23, align 2
4 store i16 1234, i16* %sunkaddr24, align 2
...
5 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128
6 %data = load ppc_fp128* %vecalign, align 16
...
The Alias Analysis will return "NoAlias" for the NO.6 instruction and No.4
instruction (but it should be PartialAlias). Alias Analysis stop analysising on
instruction NO.3, because %sunkaddr24 is not a pointer!
So, when the post-ra scheduler got "NoAlias" infomation, it would schedule
instruction like:
BB#4:
...
1 %sunkaddr = ptrto %union.VR_union uu_buf to i64
2 %sunkaddr23 = add i64 %sunkaddr, 2
; Error schedule the load instruction to this location
6 %data = load ppc_fp128* %vecalign, align 16
3 %sunkaddr24 = inttoptr i64 %sunkaddr23, align 2
4 store i16 1234, i16* %sunkaddr24, align 2
...
5 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128
...
Obviously, this is a wrong schedule.</pre>
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