[LLVMbugs] [Bug 15235] New: [x86 disassembler] add support for adcx and adox (Intel ADX instructions)

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=15235

            Bug ID: 15235
           Summary: [x86 disassembler] add support for adcx and adox
                    (Intel ADX instructions)
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: kkhoo at perfwizard.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

The "Intel® Architecture Instruction Set Extensions Programming Reference"
dated Aug 2012 ( http://software.intel.com/en-us/avx/ ) includes new
instructions scheduled for inclusion with either Haswell (scheduled for 2013)
or Broadwell (scheduled for 2014).

This includes:
ADCX — Unsigned Integer Addition of Two Operands with Carry Flag
66 0F 38 F6 /r ADCX r32, r/m32
REX.w + 66 0F 38 F6 /r ADCX r64, r/m64

and 

ADOX — Unsigned Integer Addition of Two Operands with Overflow Flag
F3 0F 38 F6 /r ADOX r32, r/m32
REX.w + F3 0F 38 F6 /r ADOX r64, r/m64

With llvm-mc (r174572), these return "invalid instruction encoding". For
example:

$ echo '0x66 0x0f 0x38 0xf6 0xc0' | ./Debug+Asserts/bin/llvm-mc -disassemble
-triple=x86_64
    .section    __TEXT,__text,regular,pure_instructions
    data16
<stdin>:1:11: warning: invalid instruction encoding
0x66 0x0f 0x38 0xf6 0xc0
          ^

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