[LLVMbugs] [Bug 13058] New: Document physreg constraints in SSA form

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13058

             Bug #: 13058
           Summary: Document physreg constraints in SSA form
           Product: Documentation
           Version: trunk
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: General docs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: stoklund at 2pi.dk
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Before register allocation, MachineInstrs are in SSA form. We still allow live
physregs which can't be in SSA form, but only under certain constraints. We
need to document those constraints.

So far, we are enforcing:

- Allocatable registers cannot be live across basic blocks, except on entry to
ABI blocks (the entry block and landing pads).

- Unallocatable registers may be live across basic blocks, but you can't use
aliases. (For example, you can't define CTR8 in one block and read CTR in
another).

- Reserved registers can do whatever you want, but defs are treated as having
side effects, blocking certain optimizations like dead code elimination. (You
don't want to DCE a stack pointer update).

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