[LLVMbugs] [Bug 13057] New: Support for terminators which define registers

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13057

             Bug #: 13057
           Summary: Support for terminators which define registers
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: hfinkel at anl.gov
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Created attachment 8703
  --> http://llvm.org/bugs/attachment.cgi?id=8703
clang -03 output from SingleSource/Regression/C/sumarray2d.c

The infrastructure in CodeGen does not properly support terminators which
define registers. This is necessary to support 'hardware loop' instructions
such as available on PowerPC (and, as far as I can tell, also Hexagon).

I've attached a test case (clang -03 output from
SingleSource/Regression/C/sumarray2d.c in the test suite).

If you run: llc -enable-ppc-ctrloops -enable-ppc-ctrloop-analysis this will
crash with:

/src/llvm-trunk-writable/lib/CodeGen/LiveIntervalAnalysis.cpp:442: void
llvm::LiveIntervals::handlePhysicalRegisterDef(llvm::MachineBasicBlock*,
llvm::MachineBasicBlock::bundle_iterator<llvm::MachineInstr,
llvm::ilist_iterator<llvm::MachineInstr> >, llvm::SlotIndex,
llvm::MachineOperand&, llvm::LiveInterval&): Assertion
`!isAllocatable(interval.reg) && "Physregs shouldn't be live out!"' failed.

There are also miscompiles on other applications, but the problems may all be
due to the same underlying issue (so I think it is best to fix this problem
first because it has a simple test case).

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