[LLVMbugs] [Bug 758] NEW: [spiller] Spiller could optimize spill code generation for 2-addr folded instructions better

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=758

           Summary: [spiller] Spiller could optimize spill code generation
                    for 2-addr folded instructions better
           Product: libraries
           Version: trunk
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: enhancement
          Priority: P2
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: sabre at nondot.org


Consider code like this on X86:

  vreg1 = ...
  vreg1 += vreg2

If vreg2 gets assigned to ESI, and vreg1 gets assigned to a stack slot, we currently emit code like this in 
some cases:

        ...
        mov DWORD PTR [ESP + 24], EBX
        add DWORD PTR [ESP + 24], ESI
        ...

It would be better to "unfold" the spill code from the add, turning this into:

        ...
        add EBX, ESI
        mov DWORD PTR [ESP + 24], EBX
        ...

if and only if EBX is not needed anymore.  This is the case in the cond_next67 block of the testcase I'll 
attach, which we currently codegen to:

LBB__do_compare_11:     # cond_next67
        mov EAX, DWORD PTR [EDX + 8]
        mov EDI, DWORD PTR [ESP + 20]
        mov EDI, DWORD PTR [EDI + 8]
        cmp EDI, EAX
        mov EBX, EAX
        cmovle EBX, EDI
        mov DWORD PTR [ESP + 28], EBX
***    mov DWORD PTR [ESP + 24], EBX
***    add DWORD PTR [ESP + 24], ESI
        add EDX, 16
        mov EBX, DWORD PTR [ESP + 20]
        add EBX, 16
        mov EBP, DWORD PTR [ESP + 24]
        cmp EBP, 1
        jl LBB__do_compare_18   #bb103

-Chris



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