[llvm-branch-commits] [llvm] [AMDGPU] Fold sudot intrinsics with a zero multiplicand (PR #226479)

Harrison Hao via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Fri Sep 25 06:03:43 PDT 2026


https://github.com/harrisonGPU created https://github.com/llvm/llvm-project/pull/226479

Replace sudot4 and sudot8 with their accumulator when either
multiplicand is zero.

For example:
```
  sudot4(sign0, x, sign1, 0, acc, clamp)
  ->
  acc
```

---

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>From f05fce633bc65b6d5c06583196beec1c04ffb5de Mon Sep 17 00:00:00 2001
From: Harrison Hao <tsworld1314 at gmail.com>
Date: Fri, 25 Sep 2026 21:01:41 +0800
Subject: [PATCH] [AMDGPU] Fold sudot intrinsics with a zero multiplicand

Replace sudot4 and sudot8 with their accumulator when either
multiplicand is zero.

For example:
```
  sudot4(sign0, x, sign1, 0, acc, clamp)
  ->
  acc
```
---
 llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp       | 3 +++
 .../test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll | 6 ++----
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 0e81d503c5fd2..494c796b4b164 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -2036,6 +2036,9 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
       return &II;
     }
 
+    if (match(Src1, m_Zero()))
+      return IC.replaceInstUsesWith(II, II.getArgOperand(4));
+
     if (Instruction *I = foldConstantIntoDotAccumulator(II, 4, 5, IC))
       return I;
 
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll b/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
index e99e6bbf00821..8ce7f4c1933fe 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
@@ -36,8 +36,7 @@ define i32 @sudot4_const_lhs(i32 %b, i32 %acc) {
 define i32 @sudot4_a_zero(i32 %b, i32 %acc) {
 ; CHECK-LABEL: define i32 @sudot4_a_zero(
 ; CHECK-SAME: i32 [[B:%.*]], i32 [[ACC:%.*]]) {
-; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 false, i32 [[B]], i1 true, i32 0, i32 [[ACC]], i1 false)
-; CHECK-NEXT:    ret i32 [[DOT]]
+; CHECK-NEXT:    ret i32 [[ACC]]
 ;
   %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 0, i1 false, i32 %b, i32 %acc, i1 false)
   ret i32 %dot
@@ -326,8 +325,7 @@ define i32 @sudot8_const_lhs(i32 %b, i32 %acc) {
 define i32 @sudot8_a_zero(i32 %b, i32 %acc) {
 ; CHECK-LABEL: define i32 @sudot8_a_zero(
 ; CHECK-SAME: i32 [[B:%.*]], i32 [[ACC:%.*]]) {
-; CHECK-NEXT:    [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 true, i32 [[B]], i1 false, i32 0, i32 [[ACC]], i1 false)
-; CHECK-NEXT:    ret i32 [[DOT]]
+; CHECK-NEXT:    ret i32 [[ACC]]
 ;
   %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 0, i1 true, i32 %b, i32 %acc, i1 false)
   ret i32 %dot



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