[llvm-branch-commits] [llvm] [2/7][PISA] Add PISA IR intrinsics, address-space utilities, calling convention (PR #214096)

[Michal Paszkowski via llvm-branch-commits]

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+//===- IntrinsicsPISA.td - Defines PISA intrinsics ---------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the PISA-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+// Pointer type definitions. See the PISA address-space specification:
+// https://intel.github.io/pisa/spaces_types.html#address-spaces
+def pisa_generic_ptr_ty  : LLVMQualPointerType<0>;  // (generic)*
+def pisa_global_ptr_ty   : LLVMQualPointerType<1>;  // (global)*
+def pisa_constant_ptr_ty : LLVMQualPointerType<2>;  // (constant)*
+def pisa_shared_ptr_ty   : LLVMQualPointerType<3>;  // (shared)*
+
+// Base classes.
+class PISAIntrinsic<list<LLVMType> ret_types, list<LLVMType> param_types = [],
+                    list<IntrinsicProperty> intr_properties = [], string name = "">
+    : Intrinsic<ret_types, param_types, intr_properties, name> {
+  let TargetPrefix = "pisa";
+}
+
+class PISADefaultAttrsIntrinsic<list<LLVMType> ret_types, list<LLVMType> param_types = [],
+                                list<IntrinsicProperty> intr_properties = [], string name = "">
+    : DefaultAttrsIntrinsic<ret_types, param_types, intr_properties, name> {
+  let TargetPrefix = "pisa";
+}
+
+class PISAIntrinsicClang<list<LLVMType> RetTypes, list<LLVMType> ParamTypes = [],
+                         list<IntrinsicProperty> IntrProperties = [], string ClangName, string Name = "">
+    : PISAIntrinsic<RetTypes, ParamTypes, IntrProperties, Name>,
+      ClangBuiltin<!strconcat("__builtin_pisa_", ClangName)>;
+
+class PISADefaultAttrsIntrinsicClang<list<LLVMType> RetTypes, list<LLVMType> ParamTypes = [],
+                                     list<IntrinsicProperty> IntrProperties = [],
+                                     string ClangName, string Name = "">
+    : PISADefaultAttrsIntrinsic<RetTypes, ParamTypes, IntrProperties, Name>,
+      ClangBuiltin<!strconcat("__builtin_pisa_", ClangName)>;
+
+// Multiclass for XYZ dimension variants.
+multiclass PISAIntrinsicXYZ<list<LLVMType> RetTypes, list<LLVMType> ParamTypes = [],
+                            list<IntrinsicProperty> IntrProperties = [], string ClangName> {
+  def _x : PISADefaultAttrsIntrinsicClang<RetTypes, ParamTypes, IntrProperties, !strconcat(ClangName, "_x")>;
+  def _y : PISADefaultAttrsIntrinsicClang<RetTypes, ParamTypes, IntrProperties, !strconcat(ClangName, "_y")>;
+  def _z : PISADefaultAttrsIntrinsicClang<RetTypes, ParamTypes, IntrProperties, !strconcat(ClangName, "_z")>;
+}
+
+// Constants.
+defvar MAX_WORK_DIM = 3;
+defvar MAX_LOCAL_SIZE = 65536;
+defvar MAX_SUB_GROUP_SIZE = 32;
+
+// Helper classes for common ArgInfo patterns. See the PISA rounding modes:
+// https://intel.github.io/pisa/floating_point.html#rounding-mode
+class RoundingModeArgInfo<ArgIndex idx> : ArgInfo<idx, [ArgName<"round">, ImmArgPrinter<"printRoundingMode">]>;
+class SaturationArgInfo<ArgIndex idx>   : ArgInfo<idx, [ArgName<"saturation">]>;
+class NanPropagateArgInfo<ArgIndex idx> : ArgInfo<idx, [ArgName<"nanp">]>;
+
+// Helper class for barrier intrinsics.
+class PISAIntrinsicBarrier<string ClangName, list<LLVMType> param_types = []>
+    : PISAIntrinsicClang<[], param_types, [IntrNoMem, IntrHasSideEffects, IntrConvergent], ClangName>;
+
+// Helper class for unary float operations with rounding mode.
+class PISAUnaryRndIntrinsic
+    : PISADefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i8_ty], [IntrNoMem, ImmArg<ArgIndex<1>>]>;
+
+// Helper class for binary float operations with rounding mode.
+class PISABinaryRndIntrinsic
+    : PISADefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i8_ty],
+                                [IntrNoMem, ImmArg<ArgIndex<2>>]>;
+
+// Helper class for float operations with rounding mode + saturation flag.
+class PISAFloatIntrinsic<LLVMType ret_ty, list<LLVMType> operand_types>
+    : PISADefaultAttrsIntrinsic<[ret_ty], [], []> {
+  defvar num_params = !size(operand_types);
+  let ParamTypes = !listconcat(
+    operand_types,
+    [llvm_i8_ty, // rounding mode
+     llvm_i1_ty] // saturation flag
+  );
+  let IntrProperties = [
+    IntrNoMem,
+    ImmArg<ArgIndex<num_params>>,
+    ImmArg<ArgIndex<!add(num_params, 1)>>,
+    RoundingModeArgInfo<ArgIndex<num_params>>,
+    SaturationArgInfo<ArgIndex<!add(num_params, 1)>>
+  ];
+}
+
+
+//===----------------------------------------------------------------------===//
+// 1. Special Registers
+// https://intel.github.io/pisa/special_registers.html
+//===----------------------------------------------------------------------===//
+
+defm int_pisa_local_id             : PISAIntrinsicXYZ<[llvm_i32_ty], [], [IntrNoMem, Range<RetIndex, 0, MAX_LOCAL_SIZE>], "local_id">;
+defm int_pisa_local_size           : PISAIntrinsicXYZ<[llvm_i32_ty], [], [IntrNoMem, Range<RetIndex, 1, !add(MAX_LOCAL_SIZE, 1)>], "local_size">;
+defm int_pisa_enqueued_local_size  : PISAIntrinsicXYZ<[llvm_i32_ty], [], [IntrNoMem, Range<RetIndex, 1, !add(MAX_LOCAL_SIZE, 1)>],
+                                                       "enqueued_local_size">;
+defm int_pisa_group_id             : PISAIntrinsicXYZ<[llvm_i32_ty], [], [IntrNoMem], "group_id">;
+defm int_pisa_group_count          : PISAIntrinsicXYZ<[llvm_i32_ty], [], [IntrNoMem], "group_count">;
+defm int_pisa_global_size          : PISAIntrinsicXYZ<[llvm_i64_ty], [], [IntrNoMem], "global_size">;
+defm int_pisa_global_offset        : PISAIntrinsicXYZ<[llvm_i64_ty], [], [IntrNoMem], "global_offset">;
+
+def int_pisa_lane_id         : PISADefaultAttrsIntrinsicClang<[llvm_i32_ty], [],
+                                   [IntrNoMem, Range<RetIndex, 0, MAX_SUB_GROUP_SIZE>], "lane_id">;
+def int_pisa_subgroup_size   : PISADefaultAttrsIntrinsicClang<[llvm_i32_ty], [],
+                                   [IntrNoMem, Range<RetIndex, MAX_SUB_GROUP_SIZE, !add(MAX_SUB_GROUP_SIZE, 1)>],
+                                   "subgroup_size">;
+def int_pisa_work_dim        : PISADefaultAttrsIntrinsicClang<[llvm_i32_ty], [],
+                                   [IntrNoMem, Range<RetIndex, 1, !add(MAX_WORK_DIM, 1)>], "work_dim">;
+
+def int_pisa_activemask          : PISAIntrinsicClang<[llvm_i32_ty], [], [IntrNoMem, IntrConvergent], "activemask">;
+
+//===----------------------------------------------------------------------===//
+// 2. Integer Arithmetic
+// https://intel.github.io/pisa/instructions_arithmetic.html
+//===----------------------------------------------------------------------===//
+
+def int_pisa_dp4a_uu : PISADefaultAttrsIntrinsic<[llvm_i32_ty],
+                           [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
+                           [IntrNoMem, IntrWillReturn, ImmArg<ArgIndex<3>>,
----------------
michalpaszkowski wrote:

Addressed in the 1036008 Removed redundant IntrWillReturn from dp4a intrinsics commit.

https://github.com/llvm/llvm-project/pull/214096