[llvm-branch-commits] [lld] 2437391 - [lld] Don't drop RELR relocations for late-added GOT entries (#211911)

[Tobias Hieta via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2026-09-23T13:54:07+02:00
New Revision: 243739128971eb198126960e038b042bf3abf2bc

URL: https://github.com/llvm/llvm-project/commit/243739128971eb198126960e038b042bf3abf2bc
DIFF: https://github.com/llvm/llvm-project/commit/243739128971eb198126960e038b042bf3abf2bc.diff

LOG: [lld] Don't drop RELR relocations for late-added GOT entries (#211911)

In #208959 we started dropping RELR relocations for late-added GOT
entries when reverting x86-64 GOTPCRELX relaxations in
X86_64::relaxOnce.

There is a separate unrelaxation bug where if the object files didn't
have any relocations of a certain type, we'd prune .relr.dyn (or even
.rela.dyn). Will be addressed separately.

Assisted-by: Gemini
(cherry picked from commit 5565740f2367093b89481ba7371adf820971977d)

Added: 
    lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s

Modified: 
    lld/ELF/Relocations.cpp
    lld/ELF/SyntheticSections.h

Removed: 
    


################################################################################
diff  --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 4702d941d28ca4..a1d3c5c2ea005f 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -724,8 +724,8 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase &isec,
   if (sym.isTagged())
     relrDyn = nullptr;
   if (relrDyn && isec.addralign >= 2 && offsetInSec % 2 == 0) {
-    relrDyn->addRelativeReloc(isec, offsetInSec, sym, addend, type, expr,
-                              shard);
+    relrDyn->addRelativeReloc<concurrent>(isec, offsetInSec, sym, addend, type,
+                                          expr, shard);
     return;
   }
   RelType relativeType = ctx.target->relativeRel;

diff  --git a/lld/ELF/SyntheticSections.h b/lld/ELF/SyntheticSections.h
index 523f6587899fe1..1079275439bc7f 100644
--- a/lld/ELF/SyntheticSections.h
+++ b/lld/ELF/SyntheticSections.h
@@ -609,12 +609,16 @@ class RelrBaseSection : public SyntheticSection {
   RelrBaseSection(Ctx &, unsigned concurrency, bool isAArch64Auth = false);
   /// Add a relative dynamic relocation that uses the target address of \p sym
   /// (i.e. InputSection::getRelocTargetVA()) + \p addend as the addend.
+  template <bool concurrent = false>
   void addRelativeReloc(InputSectionBase &isec, uint64_t offsetInSec,
                         Symbol &sym, int64_t addend, RelType addendRelType,
-                        RelExpr expr, unsigned shard) {
+                        RelExpr expr, unsigned shard = 0) {
     assert(expr != R_ADDEND && "expected non-addend relocation expression");
     isec.addReloc({expr, addendRelType, offsetInSec, addend, &sym});
-    relocsVec[shard].push_back({&isec, isec.relocs().size() - 1});
+    if constexpr (concurrent)
+      relocsVec[shard].push_back({&isec, isec.relocs().size() - 1});
+    else
+      relocs.push_back({&isec, isec.relocs().size() - 1});
   }
   bool isNeeded() const override {
     return !relocs.empty() ||

diff  --git a/lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s b/lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
new file mode 100644
index 00000000000000..6c5e5f4368a410
--- /dev/null
+++ b/lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
@@ -0,0 +1,26 @@
+# REQUIRES: x86
+## Test that RELR relocations added when unrelaxing GOTPCREL relocations
+## during layout optimization (relaxOnce) are included in .relr.dyn.
+## .quad foo ensures .relr.dyn is not removed before unrelaxing.
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t.o
+# RUN: ld.lld -pie --pack-dyn-relocs=relr --section-start=.text=0x10000 --section-start=.got=0x20000 --section-start=.data=0x100000000 %t.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck %s
+
+# CHECK:      Relocations [
+# CHECK-NEXT:   Section ({{.*}}) .relr.dyn {
+# CHECK-NEXT:     0x20000 R_X86_64_RELATIVE -
+# CHECK-NEXT:     0x100000000 R_X86_64_RELATIVE -
+# CHECK-NEXT:   }
+# CHECK-NEXT: ]
+
+.text
+.globl _start
+_start:
+  movq foo at GOTPCREL(%rip), %rax
+
+.section .data,"aw", at progbits
+.align 8
+.globl foo
+foo:
+  .quad foo