[llvm-branch-commits] [llvm] [3/7][PISA] Add PISA register file, instruction set, and MC layer (PR #214107)

[Michal Paszkowski via llvm-branch-commits]

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@@ -0,0 +1,52 @@
+//===-- PISADefines.h - Common defines for PISA ---------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_PISA_PISADEFINES_H
+#define LLVM_LIB_TARGET_PISA_PISADEFINES_H
+
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/StringRef.h"
+#include <cstdint>
+
+namespace llvm {
+namespace PISA {
+
+enum class Swizzle : unsigned { X, Y, Z, W, XYZW, XY, ZW, NONE };
+constexpr unsigned SimdSize = 32;
+
+// Keep these in sync with PISAInstrInfo.td!
+enum class LdCacheCtrl : unsigned {
+  Default = 0,
+  L1c = 1,
+  L1uc = 2,
+  L1s = 3,
+  L2c = 4,
+  L2uc = 5,
+  L3c = 6,
+  L3uc = 7,
+  ri = 8
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michalpaszkowski wrote:

Added a comment. The spelling is kept like this to also match what TableGen generates and to match the spec.

https://github.com/llvm/llvm-project/pull/214107