[llvm-branch-commits] [llvm] release/23.x: Fix `fp128` reaching `llvm_unreachable` on 32-bit PowerPC (#216613) (PR #224574)

[via llvm-branch-commits]

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/224574

Backport 8d1b38f

Requested by: @folkertdev

>From 3dc16bf17b9c715fd468024fe2c96ba7edbd0100 Mon Sep 17 00:00:00 2001
From: beetrees <b at beetr.ee>
Date: Tue, 1 Sep 2026 20:56:41 +0100
Subject: [PATCH] Fix `fp128` reaching `llvm_unreachable` on 32-bit PowerPC
 (#216613)

`fp128` is a legal type that is passed in vector registers when `vsx` is
enabled on 32-bit PowerPC: the switch statement didn't account for that,
causing an LLVM assertion.

Fixes #213355

cc @folkertdev

(cherry picked from commit 8d1b38f87103eb339224d1e6d397aad191f919e6)
---
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 5 +----
 llvm/test/CodeGen/PowerPC/ppc32-f128-abi.ll | 9 +++++++++
 2 files changed, 10 insertions(+), 4 deletions(-)
 create mode 100644 llvm/test/CodeGen/PowerPC/ppc32-f128-abi.ll

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index f6c844b6428ce..dc1bffd1cc8e1 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -4281,13 +4281,10 @@ SDValue PPCTargetLowering::LowerFormalArguments_32SVR4(
         case MVT::v16i8:
         case MVT::v8i16:
         case MVT::v4i32:
-          RC = &PPC::VRRCRegClass;
-          break;
         case MVT::v4f32:
-          RC = &PPC::VRRCRegClass;
-          break;
         case MVT::v2f64:
         case MVT::v2i64:
+        case MVT::f128:
           RC = &PPC::VRRCRegClass;
           break;
       }
diff --git a/llvm/test/CodeGen/PowerPC/ppc32-f128-abi.ll b/llvm/test/CodeGen/PowerPC/ppc32-f128-abi.ll
new file mode 100644
index 0000000000000..967c39e551718
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/ppc32-f128-abi.ll
@@ -0,0 +1,9 @@
+; RUN: llc -verify-machineinstrs -mattr=+vsx < %s | FileCheck %s
+target triple = "powerpc-unknown-linux-gnu"
+
+; CHECK-LABEL: return_second:
+; CHECK: vmr 2, 3
+; CHECK-NEXT: blr
+define fp128 @return_second(fp128, fp128) {
+    ret fp128 %1
+}