[llvm-branch-commits] [llvm] [AArch64][PAC] Emit tail calls more efficiently (PR #220193)

[Victor Campos via llvm-branch-commits]

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@@ -11800,6 +11796,16 @@ void AArch64InstrInfo::createPauthEpilogueInstr(MachineBasicBlock &MBB,
   RS.enterBasicBlockEnd(MBB);
   RS.backward(InsertPt);
 
+  bool MayCheckLR = Subtarget.getAuthenticatedLRCheckMethod(MF) !=
+                    AArch64PAuth::AuthCheckMethod::None;
+  if (ImplicitDefs.empty() && MayCheckLR) {
+    // If we may have to check LR at this point, we need a scratch register -
+    // try to pick a free one among X16 and X17.
+    Register ScratchRegForCheckVA =
+        LiveRegs.available(MRI, AArch64::X16) ? AArch64::X16 : AArch64::X17;
+    ImplicitDefs.push_back(ScratchRegForCheckVA);
+  }
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vhscampos wrote:

If you decide to do the implicif-defs and spilling in InstrInfo, I'd try to do it only for the registers that are predetermined by the instructions, that is, we can't use any, we must use the ones set in stone in the instruction reference.

I don't exactly understand this CheckVA part, but if it can accept any register as a temporary, I'd suggest that you leave it out of the implicit-defs and perform the register scavenging in PointerAuth instead.

https://github.com/llvm/llvm-project/pull/220193