[llvm-branch-commits] [llvm] [AMDGPU] Form VOPD3 pairs with pair-local literal moves (PR #223431)

Zach Goldthorpe via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Sep 16 11:10:09 PDT 2026


================
@@ -14,6 +14,13 @@
 /// shouldCombineVOPD mutator in postRA machine scheduler puts candidate
 /// instructions for VOPD back-to-back
 ///
+/// A VOPD3 component cannot encode a literal, but its src0 slot can read a
+/// scalar register, so such a pair is still possible once the value is moved
+/// into one. A pair is considered only when all of its non-inline immediates
+/// have the same 32-bit value. This keeps the transformation pair-local and
+/// prevents it from increasing instruction count or extending register
+/// pressure across pairs.
+///
----------------
zGoldthorpe wrote:

This banner has pretty inconsistent style. Would this be a good excuse to rewrite the bullet points above as well?

https://github.com/llvm/llvm-project/pull/223431


More information about the llvm-branch-commits mailing list