[llvm-branch-commits] [llvm] [AMDGPU] Prefer a safe V_PERM_PK16 follower in the scheduler (gfx1250) (PR #214597)

[Matt Arsenault via llvm-branch-commits]

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@@ -292,6 +299,21 @@ void GCNHazardRecognizer::updateMultiCycleVALUState(const MachineInstr &MI) {
   }
 }
 
+void GCNHazardRecognizer::updateVPermPk16State(const MachineInstr &MI) {
+  if (!ST.hasVPermPk16Hazard())
+    return;
+  if (!SIInstrInfo::isVPermPk16(MI.getOpcode()))
+    return;
+
+  // V_PERM_PK16 must be immediately followed by a safe instruction to clear
+  // the V_PERM_PK16 hazard. Seed to 2: schedulerAdvanceCycle decrements once
+  // before the next pick's hazard check (same convention as CyclesUntilTRANS),
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arsenm wrote:

I can't find information about this hazard in the manual? 

https://github.com/llvm/llvm-project/pull/214597