[llvm-branch-commits] [clang] [flang] [llvm] PPC: Replace EnableAIXExtendedAltivecABI with "target-abi" module flag (PR #221670)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Sep 7 00:56:01 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-powerpc
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
Continue purging ABI-influencing TargetOptions fields. Eliminate this case
by migrating to a module flag, reusing the generic target-abi module flag
with a new value.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply@<!-- -->anthropic.com>
---
Patch is 79.74 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/221670.diff
82 Files Affected:
- (modified) clang/include/clang/Basic/CodeGenOptions.def (-1)
- (modified) clang/lib/Basic/Targets/PPC.cpp (+3)
- (modified) clang/lib/CodeGen/BackendUtil.cpp (-1)
- (modified) clang/lib/Driver/ToolChains/CommonArgs.cpp (-11)
- (modified) clang/lib/Frontend/CompilerInvocation.cpp (-3)
- (added) clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c (+18)
- (modified) clang/test/Driver/lto-aix.c (+3-5)
- (modified) flang/include/flang/Frontend/TargetOptions.h (-3)
- (modified) flang/lib/Frontend/CompilerInstance.cpp (-1)
- (modified) flang/lib/Frontend/CompilerInvocation.cpp (+3-6)
- (modified) flang/lib/Frontend/FrontendActions.cpp (+1-1)
- (added) flang/test/Integration/PowerPC/aix-vec-extabi.f90 (+13)
- (modified) llvm/include/llvm/CodeGen/CommandFlags.h (-2)
- (modified) llvm/include/llvm/Target/TargetMachine.h (-4)
- (modified) llvm/include/llvm/Target/TargetOptions.h (+1-8)
- (modified) llvm/lib/CodeGen/CommandFlags.cpp (-7)
- (modified) llvm/lib/Target/PowerPC/PPC.h (+8-2)
- (modified) llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp (+1-1)
- (modified) llvm/lib/Target/PowerPC/PPCISelLowering.cpp (+1-2)
- (modified) llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp (+22-21)
- (modified) llvm/lib/Target/PowerPC/PPCSubtarget.h (+6)
- (modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-csr-vector-extabi.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-insert-extract.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-spills-for-eh.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-mir.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vec-arg-spills.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vec_extract_p9.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vec_extract_p9_2.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-vector-stack-caller.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vector-stack.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vector-vararg-caller.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee-split.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix64-virtual-call-no-spills.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/bswap64.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/cmpb.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/constants-i64.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/fdiv.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/fma-assoc.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/ftrunc-vec.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/maddld.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/mi-peephole-splat.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/mmaplus-intrinsics.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/mulli.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/p10-handle-split-promote-vec.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll (+12-12)
- (modified) llvm/test/CodeGen/PowerPC/pr33093.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/pre-inc-disable.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/setcc-to-sub.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/unal-vec-ldst.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/vec-bswap.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/vec_clz.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/vec_constants.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/vec_revb.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/vmladduhm.ll (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/xxpermdi_mnemonics.s (+4-4)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll (+1-1)
- (modified) llvm/test/Transforms/PGOProfile/ppc-prevent-mma-types.ll (+1-1)
``````````diff
diff --git a/clang/include/clang/Basic/CodeGenOptions.def b/clang/include/clang/Basic/CodeGenOptions.def
index 2a04538677005..e93131d9c48fe 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -57,7 +57,6 @@ CODEGENOPT(UniqueBasicBlockSectionNames, 1, 1, Benign) ///< Set for -funique-bas
///< Produce unique section names with
///< basic block sections.
CODEGENOPT(SeparateNamedSections, 1, 0, Benign) ///< Set for -fseparate-named-sections.
-CODEGENOPT(EnableAIXExtendedAltivecABI, 1, 0, Benign) ///< Set for -mabi=vec-extabi. Enables the extended Altivec ABI on AIX.
CODEGENOPT(XCOFFReadOnlyPointers, 1, 0, Benign) ///< Set for -mxcoff-roptr.
CODEGENOPT(AllTocData, 1, 0, Benign) ///< AIX -mtocdata
ENUM_CODEGENOPT(FramePointer, FramePointerKind, 3, FramePointerKind::None, Benign) /// frame-pointer: all,non-leaf,non-leaf-no-reserve,reserved,none
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 1ecb474c1ede8..b293bdb05f241 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -843,6 +843,9 @@ void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
if (getTriple().isOSAIX() && Opts.EnableAIXQuadwordAtomicsABI &&
HasQuadwordAtomics)
MaxAtomicInlineWidth = 128;
+
+ if (getTriple().isOSAIX() && Opts.EnableAIXExtendedAltivecABI)
+ ABI = "vec-extabi";
}
llvm::SmallVector<Builtin::InfosShard>
diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp
index c09a8f7c0d679..bba9d7b1d4eb4 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -463,7 +463,6 @@ static bool initTargetOptions(const CompilerInstance &CI,
Options.ForceDwarfFrameSection = CodeGenOpts.ForceDwarfFrameSection;
Options.EmitCallGraphSection = CodeGenOpts.CallGraphSection;
Options.EmitCallSiteInfo = CodeGenOpts.EmitCallSiteInfo;
- Options.EnableAIXExtendedAltivecABI = LangOpts.EnableAIXExtendedAltivecABI;
Options.XRayFunctionIndex = CodeGenOpts.XRayFunctionIndex;
Options.LoopAlignment = CodeGenOpts.LoopAlignment;
Options.DebugStrictDwarf = CodeGenOpts.DebugStrictDwarf;
diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp
index 64859a318485b..9ebc1785a2006 100644
--- a/clang/lib/Driver/ToolChains/CommonArgs.cpp
+++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp
@@ -1253,17 +1253,6 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const ArgList &Args,
options::OPT_gno_strict_dwarf, true))
CmdArgs.push_back(
Args.MakeArgString(Twine(PluginOptPrefix) + "-strict-dwarf=true"));
-
- for (const Arg *A : Args.filtered_reverse(options::OPT_mabi_EQ)) {
- StringRef V = A->getValue();
- if (V == "vec-default")
- break;
- if (V == "vec-extabi") {
- CmdArgs.push_back(
- Args.MakeArgString(Twine(PluginOptPrefix) + "-vec-extabi"));
- break;
- }
- }
}
bool UseSeparateSections =
diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp
index ea8368908879a..a486fc669acc4 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -1760,9 +1760,6 @@ void CompilerInvocationBase::GenerateCodeGenArgs(const CodeGenOptions &Opts,
GenerateArg(Consumer, Opt);
}
- if (Opts.EnableAIXExtendedAltivecABI)
- GenerateArg(Consumer, OPT_mabi_EQ_vec_extabi);
-
if (Opts.XCOFFReadOnlyPointers)
GenerateArg(Consumer, OPT_mxcoff_roptr);
diff --git a/clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c b/clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
new file mode 100644
index 0000000000000..0c447767877e9
--- /dev/null
+++ b/clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
@@ -0,0 +1,18 @@
+// Check that the AIX extended Altivec ABI is emitted as the "target-abi" module
+// flag
+
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -target-feature +altivec \
+// RUN: -target-cpu pwr8 -mabi=vec-extabi -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=EXTABI
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-feature +altivec \
+// RUN: -target-cpu pwr8 -mabi=vec-extabi -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=EXTABI
+
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -target-feature +altivec \
+// RUN: -target-cpu pwr8 -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefix=DFLTABI
+
+// EXTABI: !{i32 1, !"target-abi", !"vec-extabi"}
+// DFLTABI-NOT: "target-abi"
+
+void f(void) {}
diff --git a/clang/test/Driver/lto-aix.c b/clang/test/Driver/lto-aix.c
index a07dbd759fa5f..381d9207e3ea2 100644
--- a/clang/test/Driver/lto-aix.c
+++ b/clang/test/Driver/lto-aix.c
@@ -27,14 +27,12 @@
// O2: "-bplugin_opt:-O2"
// O3: "-bplugin_opt:-O3"
-// vec-extabi option
+// The vec-extabi option is emitted into the IR via the "target-abi" module flag
+//
// RUN: %clang --target=powerpc-ibm-aix --sysroot %S/Inputs/aix_ppc_tree %s \
// RUN: -fuse-ld=ld -flto -mabi=vec-extabi -### 2>&1 \
-// RUN: | FileCheck --check-prefix=VECEXTABI %s
-// RUN: %clang --target=powerpc-ibm-aix --sysroot %S/Inputs/aix_ppc_tree %s \
-// RUN: -fuse-ld=ld -flto -### 2>&1 | FileCheck --check-prefix=NOVECEXTABI %s
+// RUN: | FileCheck --check-prefix=NOVECEXTABI %s
//
-// VECEXTABI: "-bplugin_opt:-vec-extabi"
// NOVECEXTABI-NOT: "-bplugin_opt:-vec-extabi"
// Test debugging options
diff --git a/flang/include/flang/Frontend/TargetOptions.h b/flang/include/flang/Frontend/TargetOptions.h
index fc7a2a3089f15..3b81c76ffdcd9 100644
--- a/flang/include/flang/Frontend/TargetOptions.h
+++ b/flang/include/flang/Frontend/TargetOptions.h
@@ -48,9 +48,6 @@ class TargetOptions {
/// The integer KINDs disabled for this target
std::vector<int> disabledIntegerKinds;
- /// Extended Altivec ABI on AIX
- bool EnableAIXExtendedAltivecABI;
-
/// Print verbose assembly
bool asmVerbose = false;
diff --git a/flang/lib/Frontend/CompilerInstance.cpp b/flang/lib/Frontend/CompilerInstance.cpp
index 0b9dfc49c3a81..1b09fcfd049af 100644
--- a/flang/lib/Frontend/CompilerInstance.cpp
+++ b/flang/lib/Frontend/CompilerInstance.cpp
@@ -380,7 +380,6 @@ bool CompilerInstance::setUpTargetMachine() {
std::optional<llvm::CodeModel::Model> cm = getCodeModel(CGOpts.CodeModel);
llvm::TargetOptions tOpts = llvm::TargetOptions();
- tOpts.EnableAIXExtendedAltivecABI = targetOpts.EnableAIXExtendedAltivecABI;
tOpts.EnableMachineFunctionSplitter = targetOpts.SplitMachineFunctions;
tOpts.VecLib = convertDriverVectorLibraryToVectorLibrary(CGOpts.getVecLib());
tOpts.MCOptions.DisableIntegratedAS = CGOpts.DisableIntegratedAS;
diff --git a/flang/lib/Frontend/CompilerInvocation.cpp b/flang/lib/Frontend/CompilerInvocation.cpp
index 7cfd89e120b7d..cfdc7b7e129f7 100644
--- a/flang/lib/Frontend/CompilerInvocation.cpp
+++ b/flang/lib/Frontend/CompilerInvocation.cpp
@@ -612,13 +612,10 @@ static void parseTargetArgs(TargetOptions &opts, llvm::opt::ArgList &args) {
opts.disabledIntegerKinds.push_back(16);
if (const llvm::opt::Arg *a = args.getLastArg(clang::options::OPT_mabi_EQ)) {
- opts.abi = a->getValue();
llvm::StringRef V = a->getValue();
- if (V == "vec-extabi") {
- opts.EnableAIXExtendedAltivecABI = true;
- } else if (V == "vec-default") {
- opts.EnableAIXExtendedAltivecABI = false;
- }
+ // Normalize "vec-default" to an empty ABI name; the AIX extended Altivec
+ // ABI is carried to the backend as the "vec-extabi" target-abi module flag.
+ opts.abi = V == "vec-default" ? "" : V.str();
}
opts.SplitMachineFunctions =
diff --git a/flang/lib/Frontend/FrontendActions.cpp b/flang/lib/Frontend/FrontendActions.cpp
index 994fa8d46897e..7714094e04e50 100644
--- a/flang/lib/Frontend/FrontendActions.cpp
+++ b/flang/lib/Frontend/FrontendActions.cpp
@@ -843,7 +843,7 @@ void CodeGenAction::generateLLVMIR() {
}
}
- if (triple.isRISCV() && !targetOpts.abi.empty())
+ if (!targetOpts.abi.empty())
llvmModule->addModuleFlag(
llvm::Module::Error, "target-abi",
llvm::MDString::get(llvmModule->getContext(), targetOpts.abi));
diff --git a/flang/test/Integration/PowerPC/aix-vec-extabi.f90 b/flang/test/Integration/PowerPC/aix-vec-extabi.f90
new file mode 100644
index 0000000000000..3394ad9aa6ce4
--- /dev/null
+++ b/flang/test/Integration/PowerPC/aix-vec-extabi.f90
@@ -0,0 +1,13 @@
+! Check that the AIX extended Altivec ABI is emitted as the
+! "target-abi" module flag
+
+! REQUIRES: target=powerpc{{.*}}
+! RUN: %flang_fc1 -triple powerpc-ibm-aix7.2.0.0 -mabi=vec-extabi -emit-llvm -o - %s | FileCheck %s --check-prefix=EXTABI
+! RUN: %flang_fc1 -triple powerpc-ibm-aix7.2.0.0 -mabi=vec-default -emit-llvm -o - %s | FileCheck %s --check-prefix=DEFAULT
+! RUN: %flang_fc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %s | FileCheck %s --check-prefix=DEFAULT
+
+! EXTABI: !{i32 1, !"target-abi", !"vec-extabi"}
+! DEFAULT-NOT: "target-abi"
+
+subroutine func
+end subroutine func
diff --git a/llvm/include/llvm/CodeGen/CommandFlags.h b/llvm/include/llvm/CodeGen/CommandFlags.h
index b418d030e2404..552712ecba885 100644
--- a/llvm/include/llvm/CodeGen/CommandFlags.h
+++ b/llvm/include/llvm/CodeGen/CommandFlags.h
@@ -75,8 +75,6 @@ LLVM_ABI bool getDontPlaceZerosInBSS();
LLVM_ABI bool getEnableGuaranteedTailCallOpt();
-LLVM_ABI bool getEnableAIXExtendedAltivecABI();
-
LLVM_ABI bool getDisableTailCalls();
LLVM_ABI bool getStackSymbolOrdering();
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index 57c35ed564616..ba017910c263d 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -329,10 +329,6 @@ class LLVM_ABI TargetMachine {
void setCFIFixup(bool Enable) { Options.EnableCFIFixup = Enable; }
- bool getAIXExtendedAltivecABI() const {
- return Options.EnableAIXExtendedAltivecABI;
- }
-
bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
/// Return true if unique basic block section names must be generated.
diff --git a/llvm/include/llvm/Target/TargetOptions.h b/llvm/include/llvm/Target/TargetOptions.h
index 71e7b17ba3bd8..755006466191b 100644
--- a/llvm/include/llvm/Target/TargetOptions.h
+++ b/llvm/include/llvm/Target/TargetOptions.h
@@ -119,8 +119,7 @@ enum CodeObjectVersionKind {
class TargetOptions {
public:
TargetOptions()
- : EnableAIXExtendedAltivecABI(false),
- HonorSignDependentRoundingFPMathOption(false), NoZerosInBSS(false),
+ : HonorSignDependentRoundingFPMathOption(false), NoZerosInBSS(false),
GuaranteedTailCallOpt(false), StackSymbolOrdering(true),
EnableFastISel(false), EnableGlobalISel(false), UseInitArray(false),
FunctionSections(false), DataSections(false),
@@ -140,12 +139,6 @@ class TargetOptions {
EnableCFIFixup(false), MisExpect(false), XCOFFReadOnlyPointers(false),
VerifyArgABICompliance(true) {}
- /// EnableAIXExtendedAltivecABI - This flag returns true when -vec-extabi is
- /// specified. The code generator is then able to use both volatile and
- /// nonvolitle vector registers. When false, the code generator only uses
- /// volatile vector registers which is the default setting on AIX.
- unsigned EnableAIXExtendedAltivecABI : 1;
-
/// HonorSignDependentRoundingFPMath - This returns true when the
/// -enable-sign-dependent-rounding-fp-math is specified. If this returns
/// false (the default), the code generator is allowed to assume that the
diff --git a/llvm/lib/CodeGen/CommandFlags.cpp b/llvm/lib/CodeGen/CommandFlags.cpp
index 74f73d33cf8c9..3e36dffc6b9c2 100644
--- a/llvm/lib/CodeGen/CommandFlags.cpp
+++ b/llvm/lib/CodeGen/CommandFlags.cpp
@@ -76,7 +76,6 @@ CGOPT_EXP(uint64_t, LargeDataThreshold)
CGOPT(ExceptionHandling, ExceptionModel)
CGOPT_EXP(CodeGenFileType, FileType)
CGOPT(FramePointerKind, FramePointerUsage)
-CGOPT(bool, EnableAIXExtendedAltivecABI)
CGOPT(DenormalMode::DenormalModeKind, DenormalFPMath)
CGOPT(DenormalMode::DenormalModeKind, DenormalFP32Math)
CGOPT(bool, EnableHonorSignDependentRoundingFPMath)
@@ -301,11 +300,6 @@ codegen::RegisterCodeGenFlags::RegisterCodeGenFlags() {
cl::init(false));
CGBINDOPT(DontPlaceZerosInBSS);
- static cl::opt<bool> EnableAIXExtendedAltivecABI(
- "vec-extabi", cl::desc("Enable the AIX Extended Altivec ABI."),
- cl::init(false));
- CGBINDOPT(EnableAIXExtendedAltivecABI);
-
static cl::opt<bool> EnableGuaranteedTailCallOpt(
"tailcallopt",
cl::desc(
@@ -574,7 +568,6 @@ codegen::InitTargetOptionsFromCodeGenFlags(const Triple &TheTriple) {
Options.HonorSignDependentRoundingFPMathOption =
getEnableHonorSignDependentRoundingFPMath();
- Options.EnableAIXExtendedAltivecABI = getEnableAIXExtendedAltivecABI();
Options.NoZerosInBSS = getDontPlaceZerosInBSS();
Options.GuaranteedTailCallOpt = getEnableGuaranteedTailCallOpt();
Options.StackSymbolOrdering = getStackSymbolOrdering();
diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h
index 7fe80d5ba52f3..bd04ebb71b8f0 100644
--- a/llvm/lib/Target/PowerPC/PPC.h
+++ b/llvm/lib/Target/PowerPC/PPC.h
@@ -98,8 +98,14 @@ class ModulePass;
createPPCInstructionSelector(const PPCTargetMachine &, const PPCSubtarget &,
const PPCRegisterBankInfo &);
- /// The PowerPC ABI variant.
- enum PPCABI { PPC_ABI_UNKNOWN, PPC_ABI_ELFv1, PPC_ABI_ELFv2 };
+ /// The PowerPC ABI variant. PPC_ABI_AIX_EXTABI is the AIX extended Altivec
+ /// ABI ("vec-extabi").
+ enum PPCABI {
+ PPC_ABI_UNKNOWN,
+ PPC_ABI_ELFv1,
+ PPC_ABI_ELFv2,
+ PPC_ABI_AIX_EXTABI
+ };
namespace PPCII {
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index e78eb5239871f..97a8e28c601d0 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -2322,7 +2322,7 @@ uint16_t PPCAIXAsmPrinter::getNumberOfVRSaved() {
// in the default ABI.
const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
if (Subtarget.isAIXABI() && Subtarget.hasAltivec() &&
- TM.getAIXExtendedAltivecABI()) {
+ Subtarget.isAIXExtendedAltivecABI()) {
const MachineRegisterInfo &MRI = MF->getRegInfo();
for (unsigned Reg = PPC::V20; Reg <= PPC::V31; ++Reg)
if (MRI.isPhysRegModified(Reg))
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 8152d0350b018..930c83e5bb50d 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -19013,8 +19013,7 @@ PPCTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
R.second = &PPC::CRRCRegClass;
}
// FIXME: This warning should ideally be emitted in the front end.
- const auto &TM = getTargetMachine();
- if (Subtarget.isAIXABI() && !TM.getAIXExtendedAltivecABI()) {
+ if (Subtarget.isAIXABI() && !Subtarget.isAIXExtendedAltivecABI()) {
if (((R.first >= PPC::V20 && R.first <= PPC::V31) ||
(R.first >= PPC::VF20 && R.first <= PPC::VF31)) &&
(R.second == &PPC::VSRCRegClass || R.second == &PPC::VSFRCRegClass))
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index ea96394f97ff3..f5d5d945947d5 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -186,12 +186,12 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
if (Subtarget.hasVSX()) {
if (Subtarget.pairedVectorMemops())
return CSR_64_AllRegs_VSRP_SaveList;
- if (Subtarget.isAIXABI() && !TM.getAIXExtendedAltivecABI())
+ if (Subtarget.isAIXABI() && !Subtarget.isAIXExtendedAltivecABI())
return CSR_64_AllRegs_AIX_Dflt_VSX_SaveList;
return CSR_64_AllRegs_VSX_SaveList;
}
if (Subtarget.hasAltivec()) {
- if (Subtarget.isAIXABI() && !TM.getAIXExtendedAltivecABI())
+ if (Subtarget.isAIXABI() && !Subtarget.isAIXExtendedAltivecABI())
return CSR_64_AllRegs_AIX_Dflt_Altivec_SaveList;
return CSR_64_AllRegs_Altivec_SaveList;
}
@@ -235,14 +235,14 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
if (TM.isPPC64()) {
if (Subtarget.pairedVectorMemops()) {
if (Subtarget.isAIXABI()) {
- if (!TM.getAIXExtendedAltivecABI())
+ if (!Subtarget.isAIXExtendedAltivecABI())
return SaveR2 ? CSR_PPC64_R2_SaveList : CSR_PPC64_SaveList;
return SaveR2 ? CSR_AIX64_R2_VSRP_SaveList : CSR_AIX64_VSRP_SaveList;
}
return SaveR2 ? CSR_SVR464_R2_VSRP_SaveList : CSR_SVR464_VSRP_SaveList;
}
if (Subtarget.hasAltivec() &&
- (!Subtarget.isAIXABI() || TM.getAIXExtendedAltivecABI())) {
+ (!Subtarget.isAIXABI() || Subtarget.isAIXExtendedAltivecABI())) {
return SaveR2 ? CSR_PPC64_R2_Altivec_SaveList
: CSR_PPC64_Altivec_SaveList;
}
@@ -251,11 +251,11 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
// 32-bit targets.
if (Subtarget.isAIXABI()) {
if (Subtarget.pairedVectorMemops())
- return TM.getAIXExtendedAltivecABI() ? CSR_AIX32_VSRP_SaveList
- : CSR_AIX32_SaveList;
+ return Subtarget.isAIXExtendedAltivecABI() ? CSR_AIX32_VSRP_SaveList
+ : CSR_AIX32_SaveList;
if (Subtarget.hasAltivec())
- return TM.getAIXExtendedAltivecABI() ? CSR_AIX32_Altivec_SaveList
- : CSR_AIX32_SaveList;
+ return Subtarget.isAIXExtendedAltivecABI() ? CSR_AIX32_Altivec_SaveList
+ : CSR_AIX32_SaveList;
return CSR_AIX32_SaveList;
}
if (Subtarget.pairedVectorMemops())
@@ -278,12 +278,12 @@ PPCRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
if (Subtarget.hasVSX()) {
if (Subtarget.pairedVectorMemops())
return CSR_64_AllRegs_VSRP_RegMask;
- if (Subtarget.isAIXABI() && !TM.getAIXExtendedAltivecABI())
+ if (Subtarget.isAIXABI() && !Subtarget.isAIXExtendedAltivecABI())
return CSR_64_AllRegs_AIX_Dflt_VSX_RegMask;
return CSR_64_AllRegs_VSX_RegMask;
}
if (Subtarget.hasAltivec()) {
- if (Subtarget.isAIXABI() && !TM.getAIXExtendedAltivecABI())
+ if (Subtarget.isAIXABI() && !Subtarget.isAIXExtendedAltivecABI())
return CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask;
return CSR_64_AllRegs_Altivec_RegMask;
}
@@ -292,17 +292,18 @@ PPCRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
if (Subtarget.isAIXABI()) {
if (Subtarget.pairedVectorMemops()) {
- if (!TM.getAIXExtendedAltivecABI())
+ if (!Subtarget.isAIXExtendedAltivecABI())
return TM.isPPC64() ? CSR_PPC64_RegMask : CSR_AIX32_RegMask;
return TM.isPPC64() ? CSR_AIX64_VSRP_RegMask : CSR_AIX32_VSRP_RegMask;
}
- return TM.isPPC64()
- ? ((Subtarget.hasAltivec() && TM.getAIXExtendedAltivecABI())
- ? CSR_PPC64_Altivec_RegMask
- : CSR_PPC64_RegMask)
- : ((Subtarget.hasAltivec() && TM.getAIXExtendedAltivecABI())
- ? CSR_AIX32_Altivec_RegMask
- : CSR_AIX32_RegMask);
+ return TM.isPPC64() ? ((Subtarget.hasAltivec() &&
+ Subtarget.isAIXExtendedAltivecABI())
+ ? CSR_PPC64_Altivec_RegMask
+ : CSR_PPC64_RegMask)
+ : ((Subtarget.hasAltivec() &&
+ Subtarget.isAIXExtendedAltivecABI())
+ ? CSR_AIX32_Altivec_RegMask
+ : CSR_AIX32_RegMask);
}
if (CC == CallingConv::Cold) {
@@ -416,7 +417,7 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
markSuperRegs(Reserved, Reg);
if (Subtarget.isAIXABI() && Subtarget.hasAltivec() &&
- !TM.getAIXExtendedAltivecABI()) {
+ !Subtarget.is...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/221670
More information about the llvm-branch-commits
mailing list