[llvm-branch-commits] [llvm] [ConstantTime] Native ct.select support for ARM64 (PR #166706)

David Green via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Sun Sep 6 23:52:02 PDT 2026


================
@@ -5738,6 +5742,42 @@ def F128CSEL : Pseudo<(outs FPR128:$Rd),
   let hasNoSchedulingInfo = 1;
 }
 
+//===----------------------------------------------------------------------===//
+// Constant-time conditional selection instructions
+//===----------------------------------------------------------------------===//
+
+let hasSideEffects = 1, isPseudo = 1, hasNoSchedulingInfo = 1,
+    Uses = [NZCV] in {
+  def I32CTSELECT
+      : Pseudo<(outs GPR32:$dst), (ins GPR32:$tval, GPR32:$fval, i32imm:$cc),
+               [(set (i32 GPR32:$dst), (AArch64ctselect GPR32:$tval,
+                                           GPR32:$fval, (i32 imm:$cc), NZCV))]>;
+  def I64CTSELECT
+      : Pseudo<(outs GPR64:$dst), (ins GPR64:$tval, GPR64:$fval, i32imm:$cc),
+               [(set (i64 GPR64:$dst), (AArch64ctselect GPR64:$tval,
+                                           GPR64:$fval, (i32 imm:$cc), NZCV))]>;
+  let Predicates = [HasFullFP16] in {
+    def F16CTSELECT
+        : Pseudo<(outs FPR16:$dst), (ins FPR16:$tval, FPR16:$fval, i32imm:$cc),
+                 [(set (f16 FPR16:$dst), (AArch64ctselect (f16 FPR16:$tval),
+                                             (f16 FPR16:$fval), (i32 imm:$cc),
+                                             NZCV))]>;
+    def BF16CTSELECT
----------------
davemgreen wrote:

There is no need for BF16CTSELECT. You can just have a bf16 pattern that selects to CTSELECTH.

https://github.com/llvm/llvm-project/pull/166706


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