[llvm-branch-commits] [llvm] [AMDGPU] Add FUNC_WGP_MODE for object linking info flag (PR #207632)
Shilei Tian via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Sep 6 19:26:15 PDT 2026
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/207632
>From 6a131839f23f32985e1da7a530993ee0201c1766 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Sat, 4 Jul 2026 18:12:47 -0400
Subject: [PATCH] [AMDGPU] Add FUNC_WGP_MODE for object linking info flag
---
llvm/docs/AMDGPUUsage.rst | 1 +
.../llvm/Support/AMDGPUObjLinkingInfo.h | 4 ++-
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 1 +
.../AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 2 ++
.../MCTargetDesc/AMDGPUTargetStreamer.cpp | 4 +++
.../MCTargetDesc/AMDGPUTargetStreamer.h | 1 +
.../AMDGPU/lds-link-time-codegen-typeid.ll | 29 ++++++++++---------
.../CodeGen/AMDGPU/lds-link-time-codegen.ll | 21 ++++++++++++++
llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s | 10 +++----
9 files changed, 54 insertions(+), 19 deletions(-)
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 1166658d6c1c7..689b988346612 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -3468,6 +3468,7 @@ if needed.
0x1 ``FUNC_USES_VCC`` Function uses the VCC register
0x2 ``FUNC_USES_FLAT_SCRATCH`` Function uses flat scratch addressing
0x4 ``FUNC_HAS_DYN_STACK`` Function has dynamic stack allocation
+ 0x8 ``FUNC_FULL_SIMD_MODE`` Function uses full SIMD execution mode
===== =========================== ==========================================
Symbol references (``INFO_FUNC``, ``INFO_USE``, ``INFO_CALL``) generate
diff --git a/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h b/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h
index ef71e836bfc40..5c8cac56e8fb6 100644
--- a/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h
+++ b/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h
@@ -68,7 +68,9 @@ enum class FuncInfoFlags : uint32_t {
FUNC_USES_VCC = 1U << 0,
FUNC_USES_FLAT_SCRATCH = 1U << 1,
FUNC_HAS_DYN_STACK = 1U << 2,
- LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/FUNC_HAS_DYN_STACK),
+ /// Function uses full SIMD mode. If unset, the function uses half SIMD mode.
+ FUNC_FULL_SIMD_MODE = 1U << 3,
+ LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/FUNC_FULL_SIMD_MODE),
};
} // namespace AMDGPU
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 21ed7f31f5ec6..08226496b18ad 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -965,6 +965,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
/*NumAccVGPR=*/static_cast<uint32_t>(RU.NumAGPR),
/*PrivateSegmentSize=*/static_cast<uint32_t>(RU.PrivateSegmentSize),
/*Occupancy=*/Occupancy,
+ /*UsesFullSIMDMode=*/AMDGPU::isFullSIMDMode(STM),
/*UsesVCC=*/RU.UsesVCC,
/*UsesFlatScratch=*/RU.UsesFlatScratch,
/*HasDynStack=*/RU.HasDynamicallySizedStack,
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 5fb36ab7497f7..a7e19fcec62bd 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -6983,6 +6983,8 @@ bool AMDGPUAsmParser::ParseDirectiveAMDGPUInfo() {
FI.UsesFlatScratch =
!!(Flags & AMDGPU::FuncInfoFlags::FUNC_USES_FLAT_SCRATCH);
FI.HasDynStack = !!(Flags & AMDGPU::FuncInfoFlags::FUNC_HAS_DYN_STACK);
+ FI.UsesFullSIMDMode =
+ !!(Flags & AMDGPU::FuncInfoFlags::FUNC_FULL_SIMD_MODE);
HasScalarAttrs = true;
} else if (Dir == "num_sgpr") {
int64_t Val;
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
index 4f38358daca0d..ea6cd9587bf0b 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
@@ -766,6 +766,8 @@ void AMDGPUTargetAsmStreamer::emitAMDGPUInfo(
Flags |= AMDGPU::FuncInfoFlags::FUNC_USES_FLAT_SCRATCH;
if (Info->HasDynStack)
Flags |= AMDGPU::FuncInfoFlags::FUNC_HAS_DYN_STACK;
+ if (Info->UsesFullSIMDMode)
+ Flags |= AMDGPU::FuncInfoFlags::FUNC_FULL_SIMD_MODE;
OS << "\t\t.amdgpu_flags " << llvm::to_underlying(Flags) << '\n';
OS << "\t\t.amdgpu_num_sgpr " << Info->NumSGPR << '\n';
OS << "\t\t.amdgpu_num_vgpr " << Info->NumArchVGPR << '\n';
@@ -1239,6 +1241,8 @@ void AMDGPUTargetELFStreamer::emitAMDGPUInfo(
Flags |= AMDGPU::FuncInfoFlags::FUNC_USES_FLAT_SCRATCH;
if (Info->HasDynStack)
Flags |= AMDGPU::FuncInfoFlags::FUNC_HAS_DYN_STACK;
+ if (Info->UsesFullSIMDMode)
+ Flags |= AMDGPU::FuncInfoFlags::FUNC_FULL_SIMD_MODE;
EmitU32Entry(AMDGPU::InfoKind::INFO_FLAGS, llvm::to_underlying(Flags));
EmitU32Entry(AMDGPU::InfoKind::INFO_NUM_SGPR, Info->NumSGPR);
EmitU32Entry(AMDGPU::InfoKind::INFO_NUM_VGPR, Info->NumArchVGPR);
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
index 92d2fbd6db068..71c20842383c4 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
@@ -36,6 +36,7 @@ struct FuncInfo {
uint32_t NumAccVGPR = 0;
uint32_t PrivateSegmentSize = 0;
uint32_t Occupancy = 0;
+ bool UsesFullSIMDMode = false;
bool UsesVCC = false;
bool UsesFlatScratch = false;
bool HasDynStack = false;
diff --git a/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-typeid.ll b/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-typeid.ll
index ca13916828443..9cd8acacc6d8b 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-typeid.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-typeid.ll
@@ -167,48 +167,51 @@ define amdgpu_kernel void @kern() {
; CHECK-DAG: R_AMDGPU_ABS64 taker
; CHECK-DAG: R_AMDGPU_ABS64 kern
+; COM: FUNC_FULL_SIMD_MODE (0x8) is set in every scope below: gfx9 has no CU
+; COM: mode, so a work-group always runs on all four SIMDs. @icaller adds
+; COM: FUNC_USES_VCC (0x1) for 9, and @kern adds FUNC_HAS_DYN_STACK (0x2) too.
; ASM-DAG: .amdgpu_info void_void
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "v"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info i32_i32
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "ii"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info void_ptr_i32
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "vli"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info i64_i64_i64
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "lll"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info float_float
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "ii"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info ptr_addrspaces
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "vlii"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info vectors
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "iiiiliiiiiiii"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info promoted_small_ints
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "viii"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info wide_scalars
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "lliiii"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info byval_struct_private
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "vi"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info byref_struct_constant
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_typeid "vl"
; ASM-DAG: .end_amdgpu_info
; COM: Address-taken declaration: only the type-ID appears in its scope, with
@@ -235,7 +238,7 @@ define amdgpu_kernel void @kern() {
; COM: with their plain-pointer counterparts: "vi" (AS 5) and "vl" (AS 4) each
; COM: appear once despite two call sites apiece.
; ASM-DAG: .amdgpu_info icaller
-; ASM-DAG: .amdgpu_flags 1
+; ASM-DAG: .amdgpu_flags 9
; ASM-DAG: .amdgpu_indirect_call "v"
; ASM-DAG: .amdgpu_indirect_call "vlii"
; ASM-DAG: .amdgpu_indirect_call "iiiiliiiiiiii"
@@ -246,7 +249,7 @@ define amdgpu_kernel void @kern() {
; ASM-DAG: .amdgpu_indirect_call "vli"
; ASM-DAG: .end_amdgpu_info
; ASM-DAG: .amdgpu_info taker
-; ASM-DAG: .amdgpu_flags 0
+; ASM-DAG: .amdgpu_flags 8
; ASM-DAG: .amdgpu_num_vgpr {{[0-9]+}}
; ASM-DAG: .end_amdgpu_info
; COM: The kernel scope is present but carries no type IDs of its own (kernels
diff --git a/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll b/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
index e7c0e7a562d75..2acd79eeb8982 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
@@ -1,5 +1,11 @@
; RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -amdgpu-enable-object-linking < %s | FileCheck -check-prefixes=ASM %s --implicit-check-not=.amdgpu_num_agpr
; RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -amdgpu-enable-object-linking -filetype=obj < %s | llvm-readobj -r --syms --sections - | FileCheck -check-prefixes=ELF %s
+; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=FULL %s
+; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=+wavefrontsize64 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=FULL %s
+; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=+cumode -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=HALF %s
+; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=+cumode,+wavefrontsize64 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=HALF %s
+; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=FULL %s
+; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa -mattr=+cumode -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=FULL %s
; Test that with object linking enabled, external LDS declarations produce
; @abs32 at lo relocations, SHN_AMDGPU_LDS symbols, .amdgpu_lds directives,
@@ -38,6 +44,21 @@
; ASM-DAG: .amdgpu_call device_func
; ASM-DAG: .end_amdgpu_info
+; COM: FUNC_FULL_SIMD_MODE (0x8): set when the function uses full SIMD mode
+; COM: (all four SIMD32s). gfx11 default is full SIMD; +cumode selects half
+; COM: SIMD and clears the flag. gfx1250 is always full SIMD, even with
+; COM: +cumode. Checked for both +wavefrontsize32 (default) and
+; COM: +wavefrontsize64 on gfx11.
+; FULL: .amdgpu_info device_func
+; FULL-NEXT: .amdgpu_flags 8
+; FULL: .amdgpu_info test_kernel
+; FULL-NEXT: .amdgpu_flags 8
+
+; HALF: .amdgpu_info device_func
+; HALF-NEXT: .amdgpu_flags 0
+; HALF: .amdgpu_info test_kernel
+; HALF-NEXT: .amdgpu_flags 0
+
; SHN_AMDGPU_LDS directives.
; ASM-DAG: .amdgpu_lds lds_large, 256, 16
; ASM-DAG: .amdgpu_lds lds_small, 128, 4
diff --git a/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s b/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
index 47680c8a3470f..7f81913a5cbb5 100644
--- a/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
+++ b/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
@@ -31,11 +31,11 @@ addr_taken_func:
.globl extern_func
-// COM: Kernel: flags=7 (KERNEL|VCC|FLAT_SCRATCH), resources, call edge, use
-// COM: edge, indirect call, and type ID. Non-zero AGPR to verify conditional
-// COM: emission.
+// COM: Kernel: flags=15 (VCC|FLAT_SCRATCH|HAS_DYN_STACK|FULL_SIMD_MODE), resources,
+// COM: call edge, use edge, indirect call, and type ID. Non-zero AGPR to verify
+// COM: conditional emission.
.amdgpu_info my_kernel
- .amdgpu_flags 7
+ .amdgpu_flags 15
.amdgpu_num_sgpr 33
.amdgpu_num_vgpr 32
.amdgpu_num_agpr 4
@@ -69,7 +69,7 @@ addr_taken_func:
.end_amdgpu_info
// ASM: .amdgpu_info my_kernel
-// ASM: .amdgpu_flags 7
+// ASM: .amdgpu_flags 15
// ASM: .amdgpu_num_sgpr 33
// ASM: .amdgpu_num_vgpr 32
// ASM: .amdgpu_num_agpr 4
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