[llvm-branch-commits] [llvm] [AMDGPU] Update calling convention for true16 mode (PR #218463)

[Matt Arsenault via llvm-branch-commits]

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@@ -119,7 +126,13 @@ struct AMDGPUIncomingArgHandler : public CallLowering::IncomingValueHandler {
   }
 
   void copyToReg(Register ValVReg, Register PhysReg, const CCValAssign &VA) {
-    if (VA.getLocVT().getSizeInBits() < 32) {
+    const GCNSubtarget &ST = MIRBuilder.getMF().getSubtarget<GCNSubtarget>();
+    const SIRegisterInfo *TRI =
+        static_cast<const SIRegisterInfo *>(MRI.getTargetRegisterInfo());
+    bool isPhyRegSGPR = TRI->isSGPRReg(MRI, PhysReg);
+
+    if (VA.getLocVT().getSizeInBits() < 32 &&
+        (isPhyRegSGPR || !ST.useRealTrue16Insts())) {
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arsenm wrote:

same 

https://github.com/llvm/llvm-project/pull/218463