[llvm-branch-commits] [llvm] [M68k] Only fold carry into ADDX/SUBX from flags that set X. NFCI (PR #235563)
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Sun Oct 25 19:29:06 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-m68k
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
combineCarryThroughADD replaces (ADD (SETCC COND_CS, Flags), -1) with Flags. For SETCC/BRCOND users that is fine because they read C, but ADDX/SUBX read the X flag. CMP, TST, logical ops, MUL and BTST set C without changing X, so folding their flags into ADDX/SUBX would use a stale X.
Only do the fold for ADDX/SUBX when the flags come from M68kISD::ADD, SUB, ADDX or SUBX, which set X equal to C. I could not find a case that currently reaches the fold with other flags, so no test changes.
Co-Authored-By: Claude Opus 5.5 <noreply@<!-- -->anthropic.com>
---
Full diff: https://github.com/llvm/llvm-project/pull/235563.diff
1 Files Affected:
- (modified) llvm/lib/Target/M68k/M68kISelLowering.cpp (+17-7)
``````````diff
diff --git a/llvm/lib/Target/M68k/M68kISelLowering.cpp b/llvm/lib/Target/M68k/M68kISelLowering.cpp
index fa919a10df431..f8ca134b9641e 100644
--- a/llvm/lib/Target/M68k/M68kISelLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kISelLowering.cpp
@@ -3516,8 +3516,9 @@ static SDValue getSETCC(M68k::CondCode Cond, SDValue CCR, const SDLoc &dl,
}
// When legalizing carry, we create carries via add X, -1
// If that comes from an actual carry, via setcc, we use the
-// carry directly.
-static SDValue combineCarryThroughADD(SDValue CCR) {
+// carry directly. If \p NeedX is set, the user reads the X flag rather than C,
+// so only use flags from nodes that set X to the same value as C.
+static SDValue combineCarryThroughADD(SDValue CCR, bool NeedX) {
if (CCR.getOpcode() == M68kISD::ADD) {
if (isAllOnesConstant(CCR.getOperand(1))) {
SDValue Carry = CCR.getOperand(0);
@@ -3530,8 +3531,15 @@ static SDValue combineCarryThroughADD(SDValue CCR) {
Carry = Carry.getOperand(0);
if (Carry.getOpcode() == M68kISD::SETCC ||
Carry.getOpcode() == M68kISD::SETCC_CARRY) {
- if (Carry.getConstantOperandVal(0) == M68k::COND_CS)
- return Carry.getOperand(1);
+ if (Carry.getConstantOperandVal(0) == M68k::COND_CS) {
+ SDValue Flags = Carry.getOperand(1);
+ if (NeedX && Flags.getOpcode() != M68kISD::ADD &&
+ Flags.getOpcode() != M68kISD::SUB &&
+ Flags.getOpcode() != M68kISD::ADDX &&
+ Flags.getOpcode() != M68kISD::SUBX)
+ return SDValue();
+ return Flags;
+ }
}
}
}
@@ -3546,7 +3554,7 @@ static SDValue combineSetCCCCR(SDValue CCR, M68k::CondCode &CC,
SelectionDAG &DAG,
const M68kSubtarget &Subtarget) {
if (CC == M68k::COND_CS)
- if (SDValue Flags = combineCarryThroughADD(CCR))
+ if (SDValue Flags = combineCarryThroughADD(CCR, /*NeedX=*/false))
return Flags;
return SDValue();
@@ -3584,7 +3592,8 @@ static SDValue combineM68kBrCond(SDNode *N, SelectionDAG &DAG,
}
static SDValue combineSUBX(SDNode *N, SelectionDAG &DAG) {
- if (SDValue Flags = combineCarryThroughADD(N->getOperand(2))) {
+ if (SDValue Flags =
+ combineCarryThroughADD(N->getOperand(2), /*NeedX=*/true)) {
MVT VT = N->getSimpleValueType(0);
SDVTList VTs = DAG.getVTList(VT, MVT::i8);
return DAG.getNode(M68kISD::SUBX, SDLoc(N), VTs, N->getOperand(0),
@@ -3597,7 +3606,8 @@ static SDValue combineSUBX(SDNode *N, SelectionDAG &DAG) {
// Optimize RES, CCR = M68kISD::ADDX LHS, RHS, CCR
static SDValue combineADDX(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI) {
- if (SDValue Flags = combineCarryThroughADD(N->getOperand(2))) {
+ if (SDValue Flags =
+ combineCarryThroughADD(N->getOperand(2), /*NeedX=*/true)) {
MVT VT = N->getSimpleValueType(0);
SDVTList VTs = DAG.getVTList(VT, MVT::i8);
return DAG.getNode(M68kISD::ADDX, SDLoc(N), VTs, N->getOperand(0),
``````````
</details>
https://github.com/llvm/llvm-project/pull/235563
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