[llvm-branch-commits] [RISCV] Port RedundantCopyElimination to NewPM (PR #235415)
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llvm-branch-commits at lists.llvm.org
Sun Oct 25 00:46:30 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Aiden Grossman (boomanaiden154)
<details>
<summary>Changes</summary>
Standard NewPM pass porting. This pass also preserves the CFG, so mark
that it does. This results in one less machine loop construction pass in
the O3 pipeline which is nice.
---
Full diff: https://github.com/llvm/llvm-project/pull/235415.diff
5 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCV.h (+13-2)
- (modified) llvm/lib/Target/RISCV/RISCVPassRegistry.def (+2)
- (modified) llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp (+41-23)
- (modified) llvm/lib/Target/RISCV/RISCVTargetMachine.cpp (+2-2)
- (modified) llvm/test/CodeGen/RISCV/O3-pipeline.ll (-1)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCV.h b/llvm/lib/Target/RISCV/RISCV.h
index 9e1df92cbbf99..b16112a13cd16 100644
--- a/llvm/lib/Target/RISCV/RISCV.h
+++ b/llvm/lib/Target/RISCV/RISCV.h
@@ -224,8 +224,19 @@ class RISCVInsertWriteVXRMPass
FunctionPass *createRISCVInsertWriteVXRMLegacyPass();
void initializeRISCVInsertWriteVXRMLegacyPass(PassRegistry &);
-FunctionPass *createRISCVRedundantCopyEliminationPass();
-void initializeRISCVRedundantCopyEliminationPass(PassRegistry &);
+class RISCVRedundantCopyEliminationPass
+ : public OptionalPassInfoMixin<RISCVRedundantCopyEliminationPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+
+ MachineFunctionProperties getRequiredProperties() const {
+ return MachineFunctionProperties().setNoVRegs();
+ }
+};
+
+FunctionPass *createRISCVRedundantCopyEliminationLegacyPass();
+void initializeRISCVRedundantCopyEliminationLegacyPass(PassRegistry &);
FunctionPass *createRISCVMoveMergePass();
void initializeRISCVMoveMergePass(PassRegistry &);
diff --git a/llvm/lib/Target/RISCV/RISCVPassRegistry.def b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
index b6003a9c29f02..b89d5a085bedc 100644
--- a/llvm/lib/Target/RISCV/RISCVPassRegistry.def
+++ b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
@@ -57,6 +57,8 @@ MACHINE_FUNCTION_PASS("riscv-make-compressible", RISCVMakeCompressiblePass())
MACHINE_FUNCTION_PASS("riscv-merge-base-offset", RISCVMergeBaseOffsetPass())
MACHINE_FUNCTION_PASS("riscv-opt-w-instrs", RISCVOptWInstrsPass())
MACHINE_FUNCTION_PASS("riscv-qc-relax-marking", RISCVQCRelaxMarkingPass())
+MACHINE_FUNCTION_PASS("riscv-redundant-copy-elimination",
+ RISCVRedundantCopyEliminationPass())
MACHINE_FUNCTION_PASS("riscv-vector-peephole", RISCVVectorPeepholePass())
MACHINE_FUNCTION_PASS("riscv-vl-optimizer", RISCVVLOptimizerPass())
MACHINE_FUNCTION_PASS("risv-vmv0-elimination", RISCVVMV0EliminationPass())
diff --git a/llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp b/llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
index cfeb2b967d88d..3696eb710fc0d 100644
--- a/llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
@@ -28,27 +28,28 @@
#include "RISCV.h"
#include "RISCVInstrInfo.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
+#include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
+#include "llvm/IR/Analysis.h"
#include "llvm/Support/Debug.h"
#include <optional>
using namespace llvm;
-#define DEBUG_TYPE "riscv-copyelim"
+#define DEBUG_TYPE "riscv-redundant-copy-elimination"
STATISTIC(NumCopiesRemoved, "Number of copies removed.");
namespace {
-class RISCVRedundantCopyElimination : public MachineFunctionPass {
- const MachineRegisterInfo *MRI;
- const TargetRegisterInfo *TRI;
- const TargetInstrInfo *TII;
-
+class RISCVRedundantCopyEliminationLegacy : public MachineFunctionPass {
public:
static char ID;
- RISCVRedundantCopyElimination() : MachineFunctionPass(ID) {}
+ RISCVRedundantCopyEliminationLegacy() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
MachineFunctionProperties getRequiredProperties() const override {
@@ -60,19 +61,17 @@ class RISCVRedundantCopyElimination : public MachineFunctionPass {
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesCFG();
AU.addPreserved<MachineRegisterClassInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
-
-private:
- bool optimizeBlock(MachineBasicBlock &MBB);
};
} // end anonymous namespace
-char RISCVRedundantCopyElimination::ID = 0;
+char RISCVRedundantCopyEliminationLegacy::ID = 0;
-INITIALIZE_PASS(RISCVRedundantCopyElimination, "riscv-copyelim",
+INITIALIZE_PASS(RISCVRedundantCopyEliminationLegacy, "riscv-copyelim",
"RISC-V Redundant Copy Elimination", false, false)
static bool
@@ -145,7 +144,10 @@ getRegImmediateBeforeTerminator(MachineBasicBlock &MBB, Register Reg,
return std::nullopt;
}
-bool RISCVRedundantCopyElimination::optimizeBlock(MachineBasicBlock &MBB) {
+static bool optimizeBlockForRedundantCopies(MachineBasicBlock &MBB,
+ const MachineRegisterInfo *MRI,
+ const TargetRegisterInfo *TRI,
+ const TargetInstrInfo *TII) {
// Check if the current basic block has a single predecessor.
if (MBB.pred_size() != 1)
return false;
@@ -257,21 +259,37 @@ bool RISCVRedundantCopyElimination::optimizeBlock(MachineBasicBlock &MBB) {
return true;
}
-bool RISCVRedundantCopyElimination::runOnMachineFunction(MachineFunction &MF) {
- if (skipFunction(MF.getFunction()))
- return false;
-
- TII = MF.getSubtarget().getInstrInfo();
- TRI = MF.getSubtarget().getRegisterInfo();
- MRI = &MF.getRegInfo();
+static bool runRedundantCopyElimination(MachineFunction &MF) {
+ const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
+ const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+ const MachineRegisterInfo *MRI = &MF.getRegInfo();
bool Changed = false;
for (MachineBasicBlock &MBB : MF)
- Changed |= optimizeBlock(MBB);
+ Changed |= optimizeBlockForRedundantCopies(MBB, MRI, TRI, TII);
return Changed;
}
-FunctionPass *llvm::createRISCVRedundantCopyEliminationPass() {
- return new RISCVRedundantCopyElimination();
+FunctionPass *llvm::createRISCVRedundantCopyEliminationLegacyPass() {
+ return new RISCVRedundantCopyEliminationLegacy();
+}
+
+bool RISCVRedundantCopyEliminationLegacy::runOnMachineFunction(
+ MachineFunction &MF) {
+ if (skipFunction(MF.getFunction()))
+ return false;
+ return runRedundantCopyElimination(MF);
+}
+
+PreservedAnalyses
+RISCVRedundantCopyEliminationPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ MFPropsModifier _(*this, MF);
+ bool Changed = runRedundantCopyElimination(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ return getMachineFunctionPassPreservedAnalyses()
+ .preserveSet<CFGAnalyses>()
+ .preserve<MachineRegisterClassAnalysis>();
}
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 394014d6c1e7c..8451a80655cf2 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -79,7 +79,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
initializeRISCVLoadStoreOptPass(*PR);
initializeRISCVPreAllocZilsdOptPass(*PR);
initializeRISCVExpandPseudoAtomicsLegacyPass(*PR);
- initializeRISCVRedundantCopyEliminationPass(*PR);
+ initializeRISCVRedundantCopyEliminationLegacyPass(*PR);
initializeRISCVAsmPrinterPass(*PR);
initializeRISCVPromoteConstantLegacyPass(*PR);
}
@@ -591,7 +591,7 @@ void RISCVPassConfig::addFastRegAlloc() {
void RISCVPassConfig::addPostRegAlloc() {
if (TM->getOptLevel() != CodeGenOptLevel::None && CLOpts.enable_copyelim)
- addPass(createRISCVRedundantCopyEliminationPass());
+ addPass(createRISCVRedundantCopyEliminationLegacyPass());
}
bool RISCVPassConfig::addILPOpts() {
diff --git a/llvm/test/CodeGen/RISCV/O3-pipeline.ll b/llvm/test/CodeGen/RISCV/O3-pipeline.ll
index 599f720ab0c56..3945fdeeb7abe 100644
--- a/llvm/test/CodeGen/RISCV/O3-pipeline.ll
+++ b/llvm/test/CodeGen/RISCV/O3-pipeline.ll
@@ -190,7 +190,6 @@
; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: MachinePostDominator Tree Construction
-; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine Optimization Remark Emitter
; CHECK-NEXT: Shrink Wrapping analysis
``````````
</details>
https://github.com/llvm/llvm-project/pull/235415
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