[llvm-branch-commits] [RISCV] Port RISCVVMV0Elimination to NewPM (PR #235254)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Aiden Grossman (boomanaiden154)

<details>
<summary>Changes</summary>

Standard NewPM pass porting.


---
Full diff: https://github.com/llvm/llvm-project/pull/235254.diff


4 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCV.h (+13-2) 
- (modified) llvm/lib/Target/RISCV/RISCVPassRegistry.def (+1) 
- (modified) llvm/lib/Target/RISCV/RISCVTargetMachine.cpp (+2-2) 
- (modified) llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp (+24-8) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCV.h b/llvm/lib/Target/RISCV/RISCV.h
index 1d6ff8ebea62f..22f25b331b6ec 100644
--- a/llvm/lib/Target/RISCV/RISCV.h
+++ b/llvm/lib/Target/RISCV/RISCV.h
@@ -257,8 +257,19 @@ class RISCVVLOptimizerPass
 FunctionPass *createRISCVVLOptimizerLegacyPass();
 void initializeRISCVVLOptimizerLegacyPass(PassRegistry &);
 
-FunctionPass *createRISCVVMV0EliminationPass();
-void initializeRISCVVMV0EliminationPass(PassRegistry &);
+class RISCVVMV0EliminationPass
+    : public RequiredPassInfoMixin<RISCVVMV0EliminationPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+
+  MachineFunctionProperties getRequiredProperties() const {
+    return MachineFunctionProperties().setIsSSA();
+  }
+};
+
+FunctionPass *createRISCVVMV0EliminationLegacyPass();
+void initializeRISCVVMV0EliminationLegacyPass(PassRegistry &);
 
 class RISCVQCRelaxMarkingPass
     : public OptionalPassInfoMixin<RISCVQCRelaxMarkingPass> {
diff --git a/llvm/lib/Target/RISCV/RISCVPassRegistry.def b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
index 2d130e380b5a1..09da40b7d3bc5 100644
--- a/llvm/lib/Target/RISCV/RISCVPassRegistry.def
+++ b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
@@ -54,4 +54,5 @@ MACHINE_FUNCTION_PASS("riscv-opt-w-instrs", RISCVOptWInstrsPass())
 MACHINE_FUNCTION_PASS("riscv-qc-relax-marking", RISCVQCRelaxMarkingPass())
 MACHINE_FUNCTION_PASS("riscv-vector-peephole", RISCVVectorPeepholePass())
 MACHINE_FUNCTION_PASS("riscv-vl-optimizer", RISCVVLOptimizerPass())
+MACHINE_FUNCTION_PASS("risv-vmv0-elimination", RISCVVMV0EliminationPass())
 #undef MACHINE_FUNCTION_PASS
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index b236b94a449d4..59ad1c2e21516 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -68,7 +68,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
   initializeRISCVExpandPseudoPreEmitLegacyPass(*PR);
   initializeRISCVVectorPeepholeLegacyPass(*PR);
   initializeRISCVVLOptimizerLegacyPass(*PR);
-  initializeRISCVVMV0EliminationPass(*PR);
+  initializeRISCVVMV0EliminationLegacyPass(*PR);
   initializeRISCVInsertVSETVLIPass(*PR);
   initializeRISCVInsertReadWriteCSRPass(*PR);
   initializeRISCVInsertWriteVXRMPass(*PR);
@@ -580,7 +580,7 @@ void RISCVPassConfig::addPreRegAlloc() {
   if (TM->getOptLevel() != CodeGenOptLevel::None && CLOpts.enable_pipeliner)
     addPass(&MachinePipelinerID);
 
-  addPass(createRISCVVMV0EliminationPass());
+  addPass(createRISCVVMV0EliminationLegacyPass());
 }
 
 void RISCVPassConfig::addFastRegAlloc() {
diff --git a/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp b/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
index d72d27c983ada..947ba970f1ad7 100644
--- a/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
@@ -31,6 +31,9 @@
 
 #include "RISCV.h"
 #include "RISCVSubtarget.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
+#include "llvm/CodeGen/MachinePassManager.h"
+#include "llvm/IR/Analysis.h"
 #ifndef NDEBUG
 #include "llvm/ADT/PostOrderIterator.h"
 #endif
@@ -42,10 +45,10 @@ using namespace llvm;
 
 namespace {
 
-class RISCVVMV0Elimination : public MachineFunctionPass {
+class RISCVVMV0EliminationLegacy : public MachineFunctionPass {
 public:
   static char ID;
-  RISCVVMV0Elimination() : MachineFunctionPass(ID) {}
+  RISCVVMV0EliminationLegacy() : MachineFunctionPass(ID) {}
 
   bool runOnMachineFunction(MachineFunction &MF) override;
 
@@ -64,20 +67,20 @@ class RISCVVMV0Elimination : public MachineFunctionPass {
 
 } // namespace
 
-char RISCVVMV0Elimination::ID = 0;
+char RISCVVMV0EliminationLegacy::ID = 0;
 
-INITIALIZE_PASS(RISCVVMV0Elimination, DEBUG_TYPE, "RISC-V VMV0 Elimination",
-                false, false)
+INITIALIZE_PASS(RISCVVMV0EliminationLegacy, DEBUG_TYPE,
+                "RISC-V VMV0 Elimination", false, false)
 
-FunctionPass *llvm::createRISCVVMV0EliminationPass() {
-  return new RISCVVMV0Elimination();
+FunctionPass *llvm::createRISCVVMV0EliminationLegacyPass() {
+  return new RISCVVMV0EliminationLegacy();
 }
 
 static bool isVMV0(const MCOperandInfo &MCOI) {
   return MCOI.RegClass == RISCV::VMV0RegClassID;
 }
 
-bool RISCVVMV0Elimination::runOnMachineFunction(MachineFunction &MF) {
+static bool runVMV0Elimination(MachineFunction &MF) {
   // Skip if the vector extension is not enabled.
   const RISCVSubtarget *ST = &MF.getSubtarget<RISCVSubtarget>();
   if (!ST->hasVInstructions())
@@ -173,3 +176,16 @@ bool RISCVVMV0Elimination::runOnMachineFunction(MachineFunction &MF) {
 
   return true;
 }
+
+bool RISCVVMV0EliminationLegacy::runOnMachineFunction(MachineFunction &MF) {
+  return runVMV0Elimination(MF);
+}
+
+PreservedAnalyses
+RISCVVMV0EliminationPass::run(MachineFunction &MF,
+                              MachineFunctionAnalysisManager &MFAM) {
+  MFPropsModifier _(*this, MF);
+  return runVMV0Elimination(MF) ? getMachineFunctionPassPreservedAnalyses()
+                                      .preserveSet<CFGAnalyses>()
+                                : PreservedAnalyses::all();
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/235254