[llvm-branch-commits] [RISCV] Port RISCVQCRelaxMarking to NewPM (PR #235253)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Aiden Grossman (boomanaiden154)

<details>
<summary>Changes</summary>

Standard NewPM pass porting. Also mark the CFG as preserved in the
LegacyPM.


---
Full diff: https://github.com/llvm/llvm-project/pull/235253.diff


4 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCV.h (+9-2) 
- (modified) llvm/lib/Target/RISCV/RISCVPassRegistry.def (+1) 
- (modified) llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp (+31-11) 
- (modified) llvm/lib/Target/RISCV/RISCVTargetMachine.cpp (+2-2) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCV.h b/llvm/lib/Target/RISCV/RISCV.h
index b8dde46b23027..1d6ff8ebea62f 100644
--- a/llvm/lib/Target/RISCV/RISCV.h
+++ b/llvm/lib/Target/RISCV/RISCV.h
@@ -260,8 +260,15 @@ void initializeRISCVVLOptimizerLegacyPass(PassRegistry &);
 FunctionPass *createRISCVVMV0EliminationPass();
 void initializeRISCVVMV0EliminationPass(PassRegistry &);
 
-FunctionPass *createRISCVQCRelaxMarkingPass();
-void initializeRISCVQCRelaxMarkingPass(PassRegistry &);
+class RISCVQCRelaxMarkingPass
+    : public OptionalPassInfoMixin<RISCVQCRelaxMarkingPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createRISCVQCRelaxMarkingLegacyPass();
+void initializeRISCVQCRelaxMarkingLegacyPass(PassRegistry &);
 
 void initializeRISCVAsmPrinterPass(PassRegistry &);
 } // namespace llvm
diff --git a/llvm/lib/Target/RISCV/RISCVPassRegistry.def b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
index 13ce3c17913bf..2d130e380b5a1 100644
--- a/llvm/lib/Target/RISCV/RISCVPassRegistry.def
+++ b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
@@ -51,6 +51,7 @@ MACHINE_FUNCTION_PASS("riscv-lpad-setup", RISCVLandingPadSetupPass())
 MACHINE_FUNCTION_PASS("riscv-make-compressible", RISCVMakeCompressiblePass())
 MACHINE_FUNCTION_PASS("riscv-merge-base-offset", RISCVMergeBaseOffsetPass())
 MACHINE_FUNCTION_PASS("riscv-opt-w-instrs", RISCVOptWInstrsPass())
+MACHINE_FUNCTION_PASS("riscv-qc-relax-marking", RISCVQCRelaxMarkingPass())
 MACHINE_FUNCTION_PASS("riscv-vector-peephole", RISCVVectorPeepholePass())
 MACHINE_FUNCTION_PASS("riscv-vl-optimizer", RISCVVLOptimizerPass())
 #undef MACHINE_FUNCTION_PASS
diff --git a/llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp b/llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
index 33851d60c479f..e06b7656f597b 100644
--- a/llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
+++ b/llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
@@ -33,9 +33,13 @@
 #include "RISCV.h"
 #include "RISCVSubtarget.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
+#include "llvm/CodeGen/MachinePassManager.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/RegisterScavenging.h"
+#include "llvm/IR/Analysis.h"
 #include "llvm/MC/TargetRegistry.h"
+#include "llvm/Pass.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 
@@ -48,26 +52,31 @@ STATISTIC(NumMarked, "Number of Loads/Stores Marked");
 
 namespace {
 
-struct RISCVQCRelaxMarking : public MachineFunctionPass {
+struct RISCVQCRelaxMarkingLegacy : public MachineFunctionPass {
   static char ID;
 
   bool runOnMachineFunction(MachineFunction &) override;
 
-  RISCVQCRelaxMarking() : MachineFunctionPass(ID) {}
+  RISCVQCRelaxMarkingLegacy() : MachineFunctionPass(ID) {}
 
   StringRef getPassName() const override { return RISCV_QC_RELAX_MARKING_NAME; }
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.setPreservesCFG();
+    MachineFunctionPass::getAnalysisUsage(AU);
+  }
 };
 
 } // end namespace
 
-char RISCVQCRelaxMarking::ID = 0;
+char RISCVQCRelaxMarkingLegacy::ID = 0;
 
-INITIALIZE_PASS(RISCVQCRelaxMarking, DEBUG_TYPE, RISCV_QC_RELAX_MARKING_NAME,
-                false, false)
+INITIALIZE_PASS(RISCVQCRelaxMarkingLegacy, DEBUG_TYPE,
+                RISCV_QC_RELAX_MARKING_NAME, false, false)
 
 /// Returns an instance of the Make Compressible Optimization pass.
-FunctionPass *llvm::createRISCVQCRelaxMarkingPass() {
-  return new RISCVQCRelaxMarking();
+FunctionPass *llvm::createRISCVQCRelaxMarkingLegacyPass() {
+  return new RISCVQCRelaxMarkingLegacy();
 }
 
 static bool isUImm7LSB000(const MachineOperand &MO) {
@@ -133,10 +142,7 @@ static unsigned getQCMarkedOpcode(const MachineInstr &MI,
   }
 }
 
-bool RISCVQCRelaxMarking::runOnMachineFunction(MachineFunction &MF) {
-  if (skipFunction(MF.getFunction()))
-    return false;
-
+static bool runQCRelaxMarking(MachineFunction &MF) {
   // This is only relevant for QC.E.LI with a symbol, which we only use in the
   // small code model.
   if (MF.getTarget().getCodeModel() != CodeModel::Small)
@@ -217,3 +223,17 @@ bool RISCVQCRelaxMarking::runOnMachineFunction(MachineFunction &MF) {
 
   return Changed;
 }
+
+bool RISCVQCRelaxMarkingLegacy::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(MF.getFunction()))
+    return false;
+  return runQCRelaxMarking(MF);
+}
+
+PreservedAnalyses
+RISCVQCRelaxMarkingPass::run(MachineFunction &MF,
+                             MachineFunctionAnalysisManager &MFAM) {
+  return runQCRelaxMarking(MF) ? getMachineFunctionPassPreservedAnalyses()
+                                     .preserveSet<CFGAnalyses>()
+                               : PreservedAnalyses::all();
+}
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 5a80d882653e4..b236b94a449d4 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -56,7 +56,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
   initializeRISCVDeadRegisterDefinitionsLegacyPass(*PR);
   initializeRISCVLateBranchOptLegacyPass(*PR);
   initializeRISCVMakeCompressibleLegacyPass(*PR);
-  initializeRISCVQCRelaxMarkingPass(*PR);
+  initializeRISCVQCRelaxMarkingLegacyPass(*PR);
   initializeRISCVGatherScatterLoweringLegacyPass(*PR);
   initializeRISCVCodeGenPrepareLegacyPass(*PR);
   initializeRISCVZacasABIFixLegacyPass(*PR);
@@ -525,7 +525,7 @@ void RISCVPassConfig::addPreEmitPass2() {
   // Add QC Relaxation Markers as late as possible, and only for RV32
   if (TM->getOptLevel() != CodeGenOptLevel::None &&
       TM->getTargetTriple().isRISCV32())
-    addPass(createRISCVQCRelaxMarkingPass());
+    addPass(createRISCVQCRelaxMarkingLegacyPass());
 
   // Schedule the expansion of AMOs at the last possible moment, avoiding the
   // possibility for other passes to break the requirements for forward

``````````

</details>


https://github.com/llvm/llvm-project/pull/235253