[llvm-branch-commits] [llvm] AMDGPU: Emit .backend_stack_size for entry points (PR #234524)
Diana Picus via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Oct 22 01:02:32 PDT 2026
https://github.com/rovka created https://github.com/llvm/llvm-project/pull/234524
Currently, the `.backend_stack_size` PAL metadata is only emitted for functions, but some of the consumers expect it to exist for the entry points too (without it, if the entry point uses more scratch than any other functions in the pipeline then we will allocate too little scratch).
The meaning is the same for entry functions as it is for non-entry functions: the stack size of the current function plus any of its non-chain callees.
Unlike `.scratch_memory_size`, this does not get rounded up to 16.
Assisted-by: AI
>From 22ee7cefc0003b1f5f3f7362d4be00294b6b0ee8 Mon Sep 17 00:00:00 2001
From: Diana Picus <diana-magda.picus at amd.com>
Date: Thu, 15 Oct 2026 09:45:51 +0200
Subject: [PATCH] AMDGPU: Emit .backend_stack_size for entry points
Currently, the `.backend_stack_size` PAL metadata is only emitted for
functions, but some of the consumers expect it to exist for the entry
points too (without it, if the entry point uses more scratch than any
other functions in the pipeline then we will allocate too little
scratch).
The meaning is the same for entry functions as it is for non-entry
functions: the stack size of the current function plus any of its
non-chain callees.
Unlike `.scratch_memory_size`, this does not get rounded up to 16.
Assisted-by: AI
---
llvm/docs/AMDGPUUsage.rst | 4 ++++
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 ++
llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 4 ++++
llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 5 +++++
llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll | 12 +++++++-----
llvm/test/CodeGen/AMDGPU/amdpal-cs.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal-es.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal-gs.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal-hs.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal-ls.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal-vs.ll | 1 +
llvm/test/CodeGen/AMDGPU/amdpal.ll | 1 +
llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll | 4 ++++
llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll | 4 ++++
llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll | 4 ++++
llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll | 4 ++++
llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll | 4 ++++
llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll | 4 ++++
llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll | 1 +
20 files changed, 55 insertions(+), 5 deletions(-)
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 53cbb657ef9811..c145de3fbef23c 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -20946,6 +20946,10 @@ within a map that has been added by the same *vendor-name*.
=========================== ============== ========= ===============================================================
".entry_point" string The ELF symbol pointing to this pipeline's stage entry point.
".scratch_memory_size" integer Scratch memory size in bytes.
+ ".backend_stack_size" integer Amount of stack size used by the shader, including the stack
+ used by its known callees. Chain callees are excluded, since
+ they reuse the caller's stack frame. Indirect calls and
+ recursion do not contribute.
".lds_size" integer Local Data Share size in bytes.
".perf_data_buffer_size" integer Performance data buffer size in bytes.
".vgpr_count" integer Number of VGPRs used.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 9b326a12521c36..2a500a9420d334 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -1766,6 +1766,8 @@ void AMDGPUAsmPrinter::EmitPALMetadata(
MCConstantExpr::create(16, Ctx), Ctx),
Ctx);
+ MD->setBackendStackSize(CC, CurrentProgramInfo.ScratchSize);
+
if (MF.getFunction().getCallingConv() == CallingConv::AMDGPU_PS) {
unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11
? divideCeil(CurrentProgramInfo.LDSBlocks, 2)
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
index 33d0c5e7cbc7a9..adf5a27fff9a03 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
@@ -366,6 +366,10 @@ void AMDGPUPALMetadata::setScratchSize(unsigned CC, const MCExpr *Val,
setHwStage(CC, ".scratch_memory_size", msgpack::Type::UInt, Val);
}
+void AMDGPUPALMetadata::setBackendStackSize(unsigned CC, const MCExpr *Val) {
+ setHwStage(CC, ".backend_stack_size", msgpack::Type::UInt, Val);
+}
+
void AMDGPUPALMetadata::setFunctionStackFrameSize(StringRef FnName,
unsigned Val) {
auto Node = getShaderFunction(FnName);
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
index e619d140fd8395..d8fa1d3cf8ab1c 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
@@ -103,6 +103,11 @@ class AMDGPUPALMetadata {
void setScratchSize(unsigned CC, unsigned Val);
void setScratchSize(unsigned CC, const MCExpr *Val, MCContext &Ctx);
+ // Set the backend stack size metadata, including the frames of the known
+ // callees. Recursion and indirect/external calls must be handled by the
+ // consumer.
+ void setBackendStackSize(unsigned CC, const MCExpr *Val);
+
// Set the stack frame size of a function in the metadata. This only covers
// the frame of the function itself, not the frames of any of its callees.
void setFunctionStackFrameSize(StringRef FnName, unsigned Val);
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll b/llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
index 9d8da278ac79c8..90ac0759c4add2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
@@ -21,8 +21,11 @@
; CHECK-LABEL: {{^}}chain_and_gfx:
; CHECK: .set .Lchain_and_gfx.private_seg_size, 32+max(.Lgfx_alloca.private_seg_size){{$}}
+; CHECK-LABEL: {{^}}gfx_stack_only:
+; CHECK: .set .Lgfx_stack_only.private_seg_size, 20{{$}}
+
; CHECK-LABEL: {{^}}cs_to_chain_and_wwf:
-; CHECK: .set .Lcs_to_chain_and_wwf.private_seg_size, 12{{$}}
+; CHECK: .set .Lcs_to_chain_and_wwf.private_seg_size, 16+max(.Lgfx_stack_only.private_seg_size){{$}}
; CHECK-LABEL: {{^}}chain_indirect_and_wwf:
; CHECK: .set .Lchain_indirect_and_wwf.private_seg_size, 64+max(.Lwwf_alloca.private_seg_size){{$}}
@@ -32,9 +35,6 @@
; CHECK: .set .Lchain_indirect_gfx_and_wwf.private_seg_size, 64+max(.Lwwf_alloca.private_seg_size){{$}}
; CHECK: .set .Lchain_indirect_gfx_and_wwf.has_indirect_call, 1{{$}}
-; CHECK-LABEL: {{^}}gfx_stack_only:
-; CHECK: .set .Lgfx_stack_only.private_seg_size, 20{{$}}
-
; CHECK-LABEL: {{^}}wwf_callee_stack_only:
; CHECK: .set .Lwwf_callee_stack_only.private_seg_size, 16+max(.Lgfx_stack_only.private_seg_size){{$}}
@@ -47,8 +47,9 @@
; CHECK-NEXT: - .api: Vulkan
; CHECK-LABEL: .hardware_stages:
; CHECK: .cs:
+; CHECK: .backend_stack_size: 0x24{{$}}
; CHECK: .entry_point_symbol: cs_to_chain_and_wwf
-; CHECK: .scratch_memory_size: 0x10{{$}}
+; CHECK: .scratch_memory_size: 0x30{{$}}
; CHECK: .shader_functions:
; CHECK-LABEL: amdgpu_cs_chain_func:
; CHECK: .backend_stack_size: 0x10{{$}}
@@ -146,6 +147,7 @@ define amdgpu_cs void @cs_to_chain_and_wwf(<40 x i32> %v) {
.entry:
%a = alloca [2 x i32], addrspace(5)
store volatile i32 9, ptr addrspace(5) %a
+ call amdgpu_gfx void @gfx_stack_only()
call void (ptr, i32, {}, <40 x i32>, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.s.v40i32(ptr @chain_and_wwf, i32 -1, {} inreg poison, <40 x i32> %v, i32 0)
unreachable
}
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
index bc437dd2e98eae..7c5363e0f18066 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .cs:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_cs_main
; GCN-NEXT: .entry_point_symbol: cs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
index 0f941ff6ef1639..fef013c15bee1c 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
@@ -7,6 +7,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .es:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_es_main
; GCN-NEXT: .entry_point_symbol: es_amdpal
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
index 59ddb78fc2f0ac..c20cc781dc7c1b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .gs:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_gs_main
; GCN-NEXT: .entry_point_symbol: gs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
index 5edbe877339ae7..8e304d19424acf 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .hs:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_hs
; GCN-NEXT: .entry_point_symbol: hs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
index b551e63ad33b4d..03d163c6ed52b0 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
@@ -7,6 +7,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .ls:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_ls_main
; GCN-NEXT: .entry_point_symbol: ls_amdpal
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
index cf8dc31e839b31..fe132b9d331f0a 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
@@ -11,6 +11,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .ps:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_ps_main
; GCN-NEXT: .entry_point_symbol: amdpal_psenable
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
index 11f9aec79af873..619633a6a15be5 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .vs:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_vs_main
; GCN-NEXT: .entry_point_symbol: vs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal.ll b/llvm/test/CodeGen/AMDGPU/amdpal.ll
index 64db9d75ed09b3..4ed6289f4ec264 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal.ll
@@ -86,6 +86,7 @@ declare void @llvm.amdgcn.raw.ptr.buffer.store.f32(float, ptr addrspace(8), i32,
; PAL-NEXT: amdpal.pipelines:
; PAL-NEXT: - .hardware_stages:
; PAL-NEXT: .cs:
+; PAL-NEXT: .backend_stack_size: 0x10
; PAL-NEXT: .entry_point: _amdgpu_cs_main
; PAL-NEXT: .entry_point_symbol: scratch2_cs
; PAL-NEXT: .scratch_memory_size: 0x10
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
index 7342a61b4c46de..f0350d0b2c51f9 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
@@ -52,6 +52,7 @@
; CHECK-NEXT: .sample_coverage_ena: false
; CHECK-NEXT: .hardware_stages:
; CHECK-NEXT: .cs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .dynamic_vgpr_saved_count: 0x70
@@ -111,6 +112,7 @@
; CHECK-NEXT: .wavefront_size: 0x40
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_gs
; CHECK-NEXT: .entry_point_symbol: gs_shader
@@ -123,6 +125,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .hs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_hs
; CHECK-NEXT: .entry_point_symbol: hs_shader
@@ -135,6 +138,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .ps:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_ps
; CHECK-NEXT: .entry_point_symbol: ps_shader
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
index 54b86906586796..aa71346234a20a 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
@@ -51,6 +51,7 @@
; CHECK-NEXT: .sample_coverage_ena: false
; CHECK-NEXT: .hardware_stages:
; CHECK-NEXT: .cs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_cs
@@ -110,6 +111,7 @@
; CHECK-NEXT: .wavefront_size: 0x20
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_gs
; CHECK-NEXT: .entry_point_symbol: gs_shader
@@ -122,6 +124,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .hs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_hs
; CHECK-NEXT: .entry_point_symbol: hs_shader
@@ -134,6 +137,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .ps:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_ps
; CHECK-NEXT: .entry_point_symbol: ps_shader
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
index d4b40b3edf6cfb..6c36ab8ddf83fc 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
@@ -52,6 +52,7 @@
; CHECK-NEXT: .hardware_stages:
; CHECK-NEXT: .cs:
; CHECK-NEXT: .agpr_count: 0
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_cs
@@ -112,6 +113,7 @@
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
; CHECK-NEXT: .agpr_count: 0
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_gs
; CHECK-NEXT: .entry_point_symbol: gs_shader
@@ -126,6 +128,7 @@
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .hs:
; CHECK-NEXT: .agpr_count: 0
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_hs
; CHECK-NEXT: .entry_point_symbol: hs_shader
@@ -140,6 +143,7 @@
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .ps:
; CHECK-NEXT: .agpr_count: 0
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_ps
; CHECK-NEXT: .entry_point_symbol: ps_shader
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
index e566d09de33f6a..397731ebb3835a 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
@@ -52,6 +52,7 @@
; CHECK-NEXT: .sample_coverage_ena: false
; CHECK-NEXT: .hardware_stages:
; CHECK-NEXT: .cs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_cs_main
@@ -111,6 +112,7 @@
; CHECK-NEXT: .wavefront_size: 0x40
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_gs_main
; CHECK-NEXT: .entry_point_symbol: gs_shader
@@ -124,6 +126,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .hs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_hs_main
; CHECK-NEXT: .entry_point_symbol: hs_shader
@@ -137,6 +140,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .ps:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .entry_point: _amdgpu_ps_main
; CHECK-NEXT: .entry_point_symbol: ps_shader
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
index d8e535a31ea100..2035f76886c1f6 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
@@ -52,6 +52,7 @@
; CHECK-NEXT: .sample_coverage_ena: false
; CHECK-NEXT: .hardware_stages:
; CHECK-NEXT: .cs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
; CHECK-NEXT: .dynamic_vgpr_saved_count: 0x70
@@ -112,6 +113,7 @@
; CHECK-NEXT: .wavefront_size: 0x40
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_gs_main
; CHECK-NEXT: .entry_point_symbol: gs_shader
@@ -125,6 +127,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .hs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_hs_main
; CHECK-NEXT: .entry_point_symbol: hs_shader
@@ -138,6 +141,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .ps:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_ps_main
; CHECK-NEXT: .entry_point_symbol: ps_shader
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
index cb58eba4237bb2..c66cda28704b81 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
@@ -52,6 +52,7 @@
; CHECK-NEXT: .sample_coverage_ena: false
; CHECK-NEXT: .hardware_stages:
; CHECK-NEXT: .cs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_cs_main
@@ -111,6 +112,7 @@
; CHECK-NEXT: .wavefront_size: 0x40
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_gs_main
; CHECK-NEXT: .entry_point_symbol: gs_shader
@@ -124,6 +126,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .hs:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_hs_main
; CHECK-NEXT: .entry_point_symbol: hs_shader
@@ -137,6 +140,7 @@
; CHECK-NEXT: .vgpr_count: 0x1
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .ps:
+; CHECK-NEXT: .backend_stack_size: 0
; CHECK-NEXT: .debug_mode: false
; CHECK-NOT: .entry_point: _amdgpu_ps_main
; CHECK-NEXT: .entry_point_symbol: ps_shader
diff --git a/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll b/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
index d9964cbde7555a..3c73e941baca10 100644
--- a/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
+++ b/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
@@ -15,6 +15,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .cs:
+; GCN-NEXT: .backend_stack_size: 0
; GCN-NEXT: .entry_point: _amdgpu_cs_main
; GCN-NEXT: .entry_point_symbol: _amdgpu_cs_main
; GCN-NEXT: .scratch_memory_size: 0
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