[llvm-branch-commits] [llvm] [AMDGPU] Model ordered XDL writes in expert scheduling (PR #218326)
Austin Kerbow via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Oct 19 23:40:57 PDT 2026
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@@ -884,14 +903,26 @@ void WaitcntBrackets::updateByEvent(HWEvents E, MachineInstr &Inst) {
Increment = 2;
}
unsigned CurrScore = UB + Increment;
- if (CurrScore == 0)
+ // Increment can be two, so unsigned overflow may wrap to one instead of zero.
+ if (CurrScore <= UB)
report_fatal_error("InsertWaitcnt score wraparound");
// PendingEvents and ScoreUB need to be update regardless if this event
// changes the score of a register or not.
// Examples including vm_cnt when buffer-store or lgkm_cnt when send-message.
PendingEvents |= E;
setScoreUB(T, CurrScore);
+ if (E == HWEvents::VGPR_XDL_WRITE && Context->TII.isVAVDSTOrderedXDL(Inst)) {
+ // While an earlier write is pending, every later ordered XDL write must
+ // also be pending. Count those writes as a per-dependency wait bound.
+ for (auto &Entry : VMem) {
----------------
kerbowa wrote:
Done.
https://github.com/llvm/llvm-project/pull/218326
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