[llvm-branch-commits] [llvm] release/23.x: [Mips] Fix symbol names for private functions in relocation hints (#230572) (PR #231166)
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Oct 19 00:20:19 PDT 2026
https://github.com/tru updated https://github.com/llvm/llvm-project/pull/231166
>From fc0ef7a41e52b8c144a1d91eeac35723d92486fb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex at alexrp.com>
Date: Mon, 12 Oct 2026 14:51:22 +0200
Subject: [PATCH] [Mips] Fix symbol names for private functions in relocation
hints (#230572)
Fixes errors such as
ld.lld: error: undefined symbol: compiler_rt.rem_pio2.rem_pio2
>>> referenced by compiler_rt
>>>
/home/alexrp/.cache/zig/o/a0062b09f46a198885da4835be133933/compiler_rt_zcu.o:(tan)
in archive
/home/alexrp/.cache/zig/o/a0062b09f46a198885da4835be133933/libcompiler_rt.a
which would happen because the actual symbol is
`$compiler_rt.rem_pio2.rem_pio2` for O32 or
`.Lcompiler_rt.rem_pio2.rem_pio2` for N64/N32.
(cherry picked from commit f93c537b4d5e128c3bc447a9e290f8c97b274e2d)
---
llvm/lib/Target/Mips/MipsFastISel.cpp | 3 +-
llvm/lib/Target/Mips/MipsISelLowering.cpp | 20 ++++++-----
llvm/test/CodeGen/Mips/private-fn.ll | 42 +++++++++++++++++++++++
3 files changed, 54 insertions(+), 11 deletions(-)
create mode 100644 llvm/test/CodeGen/Mips/private-fn.ll
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp
index bc5885b2ba3c3..9c2b04ebb82e8 100644
--- a/llvm/lib/Target/Mips/MipsFastISel.cpp
+++ b/llvm/lib/Target/Mips/MipsFastISel.cpp
@@ -1586,8 +1586,7 @@ bool MipsFastISel::fastLowerCall(CallLoweringInfo &CLI) {
if (Symbol)
MIB.addSym(Symbol, MipsII::MO_JALR);
else
- MIB.addSym(FuncInfo.MF->getContext().getOrCreateSymbol(
- Addr.getGlobalValue()->getName()), MipsII::MO_JALR);
+ MIB.addSym(TM.getSymbol(Addr.getGlobalValue()), MipsII::MO_JALR);
}
// Finish off the call including any return values.
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 1e059a6404e74..6eb65aa6c3ad4 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -3256,30 +3256,32 @@ void MipsTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
// If added to MI, asm printer will emit .reloc R_MIPS_JALR for the
// symbol.
const SDValue TargetAddr = Node->getOperand(0).getOperand(1);
- StringRef Sym;
+ MCSymbol *S = nullptr;
if (const GlobalAddressSDNode *G =
dyn_cast_or_null<const GlobalAddressSDNode>(TargetAddr)) {
+ const GlobalValue *GV = G->getGlobal();
+
// We must not emit the R_MIPS_JALR relocation against data symbols
// since this will cause run-time crashes if the linker replaces the
// call instruction with a relative branch to the data symbol.
- if (!isa<Function>(G->getGlobal())) {
+ if (!isa<Function>(GV)) {
LLVM_DEBUG(dbgs() << "Not adding R_MIPS_JALR against data symbol "
- << G->getGlobal()->getName() << "\n");
+ << GV->getName() << "\n");
return;
}
- Sym = G->getGlobal()->getName();
+ S = getTargetMachine().getSymbol(GV);
}
else if (const ExternalSymbolSDNode *ES =
dyn_cast_or_null<const ExternalSymbolSDNode>(TargetAddr)) {
- Sym = ES->getSymbol();
+ S = MI.getParent()->getParent()->getContext().getOrCreateSymbol(
+ ES->getSymbol());
}
- if (Sym.empty())
+ if (!S)
return;
- MachineFunction *MF = MI.getParent()->getParent();
- MCSymbol *S = MF->getContext().getOrCreateSymbol(Sym);
- LLVM_DEBUG(dbgs() << "Adding R_MIPS_JALR against " << Sym << "\n");
+ LLVM_DEBUG(dbgs() << "Adding R_MIPS_JALR against " << S->getName()
+ << "\n");
MI.addOperand(MachineOperand::CreateMCSymbol(S, MipsII::MO_JALR));
}
}
diff --git a/llvm/test/CodeGen/Mips/private-fn.ll b/llvm/test/CodeGen/Mips/private-fn.ll
new file mode 100644
index 0000000000000..727c68203d1c5
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/private-fn.ll
@@ -0,0 +1,42 @@
+; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-O32
+; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel=false < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-O32
+; RUN: llc -mtriple=mips64el -relocation-model=pic -O0 -fast-isel-abort=3 < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-N64
+; RUN: llc -mtriple=mips64el -relocation-model=pic -O0 -fast-isel=false < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-N64
+; RUN: llc -mtriple=mips64el -target-abi n32 -relocation-model=pic -O0 -fast-isel-abort=3 < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-N32
+; RUN: llc -mtriple=mips64el -target-abi n32 -relocation-model=pic -O0 -fast-isel=false < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-N32
+
+define private void @priv() {
+ ret void
+}
+
+define ptr @addr() {
+; CHECK-LABEL: addr:
+; CHECK-O32: lw $[[R:[0-9]+]], %got($priv)(${{[0-9]+}})
+; CHECK-O32-NEXT: addiu ${{[0-9]+}}, $[[R]], %lo($priv)
+; CHECK-N64: ld $[[R:[0-9]+]], %got_page(.Lpriv)(${{[0-9]+}})
+; CHECK-N64-NEXT: daddiu ${{[0-9]+}}, $[[R]], %got_ofst(.Lpriv)
+; CHECK-N32: lw $[[R:[0-9]+]], %got_page(.Lpriv)(${{[0-9]+}})
+; CHECK-N32-NEXT: addiu ${{[0-9]+}}, $[[R]], %got_ofst(.Lpriv)
+ ret ptr @priv
+}
+
+define void @call() {
+; CHECK-LABEL: call:
+; CHECK-O32: lw $[[R:[0-9]+]], %got($priv)(${{[0-9]+}})
+; CHECK-O32-NEXT: addiu $25, $[[R]], %lo($priv)
+; CHECK-O32-NEXT: .reloc {{.*}}, R_MIPS_JALR, $priv
+; CHECK-N64: ld $[[R:[0-9]+]], %got_page(.Lpriv)(${{[0-9]+}})
+; CHECK-N64-NEXT: daddiu ${{[0-9]+}}, $[[R]], %got_ofst(.Lpriv)
+; CHECK-N64-NEXT: .reloc {{.*}}, R_MIPS_JALR, .Lpriv
+; CHECK-N32: lw $[[R:[0-9]+]], %got_page(.Lpriv)(${{[0-9]+}})
+; CHECK-N32-NEXT: addiu ${{[0-9]+}}, $[[R]], %got_ofst(.Lpriv)
+; CHECK-N32-NEXT: .reloc {{.*}}, R_MIPS_JALR, .Lpriv
+ call void @priv()
+ ret void
+}
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