[llvm-branch-commits] [llvm] [LoongArch] Extract FP vector element 0 as a subregister (PR #233004)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Oct 16 20:04:46 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-loongarch
Author: hev (heiher)
<details>
<summary>Changes</summary>
Element 0 of an LSX/LASX floating-point vector is the aliased FPR, so extractelement with index 0 needs no [x]vreplvei/xvpickve.
---
Patch is 36.21 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/233004.diff
11 Files Affected:
- (modified) llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td (+9)
- (modified) llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td (+7)
- (modified) llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll (-1)
- (modified) llvm/test/CodeGen/LoongArch/lasx/extract-fp-elt0.ll (+2-5)
- (modified) llvm/test/CodeGen/LoongArch/lasx/fpowi.ll (-4)
- (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/flog2.ll (-4)
- (modified) llvm/test/CodeGen/LoongArch/llvm.exp10.ll (+6-6)
- (modified) llvm/test/CodeGen/LoongArch/llvm.sincos.ll (+37-43)
- (modified) llvm/test/CodeGen/LoongArch/lsx/extract-fp-elt0.ll (+2-5)
- (modified) llvm/test/CodeGen/LoongArch/lsx/fpowi.ll (+30-32)
- (modified) llvm/test/CodeGen/LoongArch/lsx/ir-instruction/flog2.ll (+30-34)
``````````diff
diff --git a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
index fcd134770332de..83cb6eb5ab191d 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
@@ -2159,6 +2159,15 @@ def : Pat<(f32(vector_extract v8f32:$xj, uimm3:$imm)),
(EXTRACT_SUBREG(XVPICKVE_W v8f32:$xj, uimm3:$imm), sub_32)>;
def : Pat<(f64(vector_extract v4f64:$xj, uimm2:$imm)),
(EXTRACT_SUBREG(XVPICKVE_D v4f64:$xj, uimm2:$imm), sub_64)>;
+// Element 0 of a floating-point vector already lives in the aliased FPR.
+let AddedComplexity = 10 in {
+def : Pat<(f32 (vector_extract v8f32:$xj, 0)),
+ (f32 (EXTRACT_SUBREG (v4f32 (EXTRACT_SUBREG v8f32:$xj, sub_128)),
+ sub_32))>;
+def : Pat<(f64 (vector_extract v4f64:$xj, 0)),
+ (f64 (EXTRACT_SUBREG (v2f64 (EXTRACT_SUBREG v4f64:$xj, sub_128)),
+ sub_64))>;
+} // AddedComplexity = 10
// vselect
def : Pat<(v32i8 (vselect LASX256:$xd, (v32i8 (SplatPat_uimm8 uimm8:$imm)),
diff --git a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
index e1489f9e36d69b..821839fcf0e1c7 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
@@ -2360,6 +2360,13 @@ def : Pat<(f32 (vector_extract v4f32:$vj, uimm2:$imm)),
(f32 (EXTRACT_SUBREG (VREPLVEI_W v4f32:$vj, uimm2:$imm), sub_32))>;
def : Pat<(f64 (vector_extract v2f64:$vj, uimm1:$imm)),
(f64 (EXTRACT_SUBREG (VREPLVEI_D v2f64:$vj, uimm1:$imm), sub_64))>;
+// Element 0 of a floating-point vector already lives in the aliased FPR.
+let AddedComplexity = 1 in {
+def : Pat<(f32 (vector_extract v4f32:$vj, 0)),
+ (f32 (EXTRACT_SUBREG v4f32:$vj, sub_32))>;
+def : Pat<(f64 (vector_extract v2f64:$vj, 0)),
+ (f64 (EXTRACT_SUBREG v2f64:$vj, sub_64))>;
+} // AddedComplexity = 1
// Vector extraction with variable index.
def : Pat<(GRLenVT (vector_extract v16i8:$vj, GRLenVT:$rk)),
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll
index ef6b8fdb86ce73..cb64d4c6acd97e 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll
@@ -252,7 +252,6 @@ define double @convert_u64_to_double(i64 %a) nounwind {
; LA64: # %bb.0:
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
; LA64-NEXT: vffint.d.lu $vr0, $vr0
-; LA64-NEXT: vreplvei.d $vr0, $vr0, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: ret
%1 = uitofp i64 %a to double
diff --git a/llvm/test/CodeGen/LoongArch/lasx/extract-fp-elt0.ll b/llvm/test/CodeGen/LoongArch/lasx/extract-fp-elt0.ll
index 421c40af9d957a..cc051bdbec40bf 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/extract-fp-elt0.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/extract-fp-elt0.ll
@@ -6,7 +6,6 @@
define double @extract_v4f64_0(<4 x double> %v, double %a) nounwind {
; CHECK-LABEL: extract_v4f64_0:
; CHECK: # %bb.0:
-; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
; CHECK-NEXT: fadd.d $fa0, $fa0, $fa1
; CHECK-NEXT: ret
%e = extractelement <4 x double> %v, i32 0
@@ -28,9 +27,8 @@ define double @extract_v4f64_1(<4 x double> %v, double %a) nounwind {
define double @extract_v4f64_sum(<4 x double> %v) nounwind {
; CHECK-LABEL: extract_v4f64_sum:
; CHECK: # %bb.0:
-; CHECK-NEXT: xvpickve.d $xr1, $xr0, 0
-; CHECK-NEXT: xvpickve.d $xr0, $xr0, 1
-; CHECK-NEXT: fadd.d $fa0, $fa1, $fa0
+; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1
+; CHECK-NEXT: fadd.d $fa0, $fa0, $fa1
; CHECK-NEXT: ret
%e0 = extractelement <4 x double> %v, i32 0
%e1 = extractelement <4 x double> %v, i32 1
@@ -41,7 +39,6 @@ define double @extract_v4f64_sum(<4 x double> %v) nounwind {
define float @extract_v8f32_0(<8 x float> %v, float %a) nounwind {
; CHECK-LABEL: extract_v8f32_0:
; CHECK: # %bb.0:
-; CHECK-NEXT: xvpickve.w $xr0, $xr0, 0
; CHECK-NEXT: fadd.s $fa0, $fa0, $fa1
; CHECK-NEXT: ret
%e = extractelement <8 x float> %v, i32 0
diff --git a/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll b/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
index 45b25013c9173a..9742529861f449 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
@@ -52,7 +52,6 @@ define <8 x float> @powi_v8f32(<8 x float> %va, i32 %b) nounwind {
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
-; LA32-NEXT: xvpickve.w $xr0, $xr0, 0
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: move $a0, $fp
; LA32-NEXT: bl __powisf2
@@ -138,7 +137,6 @@ define <8 x float> @powi_v8f32(<8 x float> %va, i32 %b) nounwind {
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
-; LA64-NEXT: xvpickve.w $xr0, $xr0, 0
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: move $a0, $fp
; LA64-NEXT: pcaddu18i $ra, %call36(__powisf2)
@@ -210,7 +208,6 @@ define <4 x double> @powi_v4f64(<4 x double> %va, i32 %b) nounwind {
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA32-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
-; LA32-NEXT: xvpickve.d $xr0, $xr0, 0
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA32-NEXT: move $a0, $fp
; LA32-NEXT: bl __powidf2
@@ -257,7 +254,6 @@ define <4 x double> @powi_v4f64(<4 x double> %va, i32 %b) nounwind {
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
-; LA64-NEXT: xvpickve.d $xr0, $xr0, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA64-NEXT: move $a0, $fp
; LA64-NEXT: pcaddu18i $ra, %call36(__powidf2)
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/flog2.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/flog2.ll
index 68f2e3ab488e1a..f0ded87684db36 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/flog2.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/flog2.ll
@@ -50,7 +50,6 @@ define void @flog2_v8f32(ptr %res, ptr %a) nounwind {
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
-; LA32-NEXT: xvpickve.w $xr0, $xr0, 0
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $xr0
@@ -129,7 +128,6 @@ define void @flog2_v8f32(ptr %res, ptr %a) nounwind {
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
-; LA64-NEXT: xvpickve.w $xr0, $xr0, 0
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
@@ -197,7 +195,6 @@ define void @flog2_v4f64(ptr %res, ptr %a) nounwind {
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA32-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
-; LA32-NEXT: xvpickve.d $xr0, $xr0, 0
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA32-NEXT: bl log2
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
@@ -242,7 +239,6 @@ define void @flog2_v4f64(ptr %res, ptr %a) nounwind {
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
-; LA64-NEXT: xvpickve.d $xr0, $xr0, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2)
; LA64-NEXT: jirl $ra, $ra, 0
diff --git a/llvm/test/CodeGen/LoongArch/llvm.exp10.ll b/llvm/test/CodeGen/LoongArch/llvm.exp10.ll
index f7f2e5158e89d0..e67db04eea3a28 100644
--- a/llvm/test/CodeGen/LoongArch/llvm.exp10.ll
+++ b/llvm/test/CodeGen/LoongArch/llvm.exp10.ll
@@ -137,20 +137,20 @@ define <2 x float> @exp10_v2f32(<2 x float> %x) #0 {
; LA64-NEXT: addi.d $sp, $sp, -48
; LA64-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
-; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(exp10f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
-; LA64-NEXT: vreplvei.w $vr0, $vr0, 0
+; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(exp10f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
-; LA64-NEXT: vextrins.w $vr0, $vr1, 16
+; LA64-NEXT: vextrins.w $vr1, $vr0, 16
+; LA64-NEXT: vori.b $vr0, $vr1, 0
; LA64-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 48
; LA64-NEXT: ret
@@ -196,20 +196,20 @@ define <2 x double> @exp10_v2f64(<2 x double> %x) #0 {
; LA64-NEXT: addi.d $sp, $sp, -48
; LA64-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
; LA64-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
-; LA64-NEXT: vreplvei.d $vr0, $vr0, 1
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(exp10)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
-; LA64-NEXT: vreplvei.d $vr0, $vr0, 0
+; LA64-NEXT: vreplvei.d $vr0, $vr0, 1
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(exp10)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA64-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
-; LA64-NEXT: vextrins.d $vr0, $vr1, 16
+; LA64-NEXT: vextrins.d $vr1, $vr0, 16
+; LA64-NEXT: vori.b $vr0, $vr1, 0
; LA64-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 48
; LA64-NEXT: ret
diff --git a/llvm/test/CodeGen/LoongArch/llvm.sincos.ll b/llvm/test/CodeGen/LoongArch/llvm.sincos.ll
index 226e19e319bf29..f999c346d10f47 100644
--- a/llvm/test/CodeGen/LoongArch/llvm.sincos.ll
+++ b/llvm/test/CodeGen/LoongArch/llvm.sincos.ll
@@ -349,38 +349,36 @@ define { <2 x float>, <2 x float> } @test_sincos_v2f32(<2 x float> %a) #0 {
; LA64: # %bb.0:
; LA64-NEXT: addi.d $sp, $sp, -80
; LA64-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
-; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
-; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
-; LA64-NEXT: vreplvei.w $vr0, $vr0, 0
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
-; LA64-NEXT: vextrins.w $vr0, $vr1, 16
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: vextrins.w $vr1, $vr0, 16
+; LA64-NEXT: vst $vr1, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fmov.s $fa1, $fa0
-; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
+; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 16
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 80
; LA64-NEXT: ret
@@ -442,26 +440,24 @@ define { <3 x float>, <3 x float> } @test_sincos_v3f32(<3 x float> %a) #0 {
; LA64-NEXT: addi.d $sp, $sp, -96
; LA64-NEXT: st.d $ra, $sp, 88 # 8-byte Folded Spill
; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
-; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vst $vr0, $sp, 64 # 16-byte Folded Spill
; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
-; LA64-NEXT: vreplvei.w $vr0, $vr0, 0
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
+; LA64-NEXT: vreplvei.w $vr0, $vr0, 1
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vld $vr1, $sp, 64 # 16-byte Folded Reload
-; LA64-NEXT: vextrins.w $vr0, $vr1, 16
-; LA64-NEXT: vst $vr0, $sp, 64 # 16-byte Folded Spill
+; LA64-NEXT: vextrins.w $vr1, $vr0, 16
+; LA64-NEXT: vst $vr1, $sp, 64 # 16-byte Folded Spill
; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vreplvei.w $vr0, $vr0, 2
-; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sinf)
; LA64-NEXT: jirl $ra, $ra, 0
@@ -469,26 +465,26 @@ define { <3 x float>, <3 x float> } @test_sincos_v3f32(<3 x float> %a) #0 {
; LA64-NEXT: vld $vr1, $sp, 64 # 16-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 32
; LA64-NEXT: vst $vr1, $sp, 64 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
-; LA64-NEXT: vextrins.w $vr0, $vr1, 16
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: vextrins.w $vr1, $vr0, 16
+; LA64-NEXT: vst $vr1, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0 killed $f0 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cosf)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
-; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 32
; LA64-NEXT: vld $vr0, $sp, 64 # 16-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 88 # 8-byte Folded Reload
@@ -582,38 +578,36 @@ define { <2 x double>, <2 x double> } @test_sincos_v2f64(<2 x double> %a) #0 {
; LA64: # %bb.0:
; LA64-NEXT: addi.d $sp, $sp, -80
; LA64-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
-; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
-; LA64-NEXT: vreplvei.d $vr0, $vr0, 1
-; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sin)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
-; LA64-NEXT: vreplvei.d $vr0, $vr0, 0
+; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vreplvei.d $vr0, $vr0, 1
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(sin)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
-; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
-; LA64-NEXT: vextrins.d $vr0, $vr1, 16
-; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
-; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: vextrins.d $vr1, $vr0, 16
+; LA64-NEXT: vst $vr1, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cos)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
-; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
+; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; LA64-NEXT: pcaddu18i $ra, %call36(cos)
; LA64-NEXT: jirl $ra, $ra, 0
-; LA64-NEXT: fmov.d $fa1, $fa0
-; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
+; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
+; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: vextrins.d $vr1, $vr0, 16
-; LA64-NEXT: vld $vr0, $sp, 32 # 16-byte Folded Reload
+; LA64-NEXT: vld $vr0, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 80
; LA64-NEXT: ret
diff --git a/llvm/test/CodeGen/LoongArch/lsx/extract-fp-elt0.ll b/llvm/test/CodeGen/LoongArch/lsx/extract-fp-elt0.ll
index 26a71e89566c43..346bf0e979ef30 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/extract-fp-elt0.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/extract-fp-elt0.ll
@@ -6,7 +6,6 @@
define double @extract_v2f64_0(<2 x double> %v, double %a) nounwind {
; CHECK-LABEL: extract_v2f64_0:
; CHECK: # %bb.0:
-; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
; CHECK-NEXT: fadd.d $fa0, $fa0, $fa1
; CHECK-NEXT: ret
%e = extractelement <2 x double> %v, i32 0
@@ -28,9 +27,8 @@ define double @extra...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/233004
More information about the llvm-branch-commits
mailing list