[llvm-branch-commits] [llvm] TableGen: Skip classes without matching super-register classes in RegisterBankEmitter (PR #232817)

Jay Foad via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Fri Oct 16 10:00:15 PDT 2026

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jayfoad wrote:

Cc @roman1741941, reminiscent of #208297.

https://github.com/llvm/llvm-project/pull/232817

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