[llvm-branch-commits] [llvm] [AMDGPU] Extract SIAtomicAddrSpace and fence MMRA parsing from SIMemoryLegalizer (PR #231854)

[Sameer Sahasrabuddhe via llvm-branch-commits]

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@@ -478,4 +480,67 @@ bool isClobberedInFunction(const LoadInst *Load, MemorySSA *MSSA,
   return false;
 }
 
+SIAtomicAddrSpace toSIAtomicAddrSpace(unsigned AS) {
+  if (AS == AMDGPUAS::FLAT_ADDRESS)
+    return SIAtomicAddrSpace::FLAT;
+  if (AS == AMDGPUAS::GLOBAL_ADDRESS)
+    return SIAtomicAddrSpace::GLOBAL;
+  if (AS == AMDGPUAS::LOCAL_ADDRESS)
+    return SIAtomicAddrSpace::LDS;
+  if (AS == AMDGPUAS::PRIVATE_ADDRESS)
+    return SIAtomicAddrSpace::SCRATCH;
+  if (AS == AMDGPUAS::REGION_ADDRESS)
+    return SIAtomicAddrSpace::GDS;
+  if (AS == AMDGPUAS::BUFFER_FAT_POINTER || AS == AMDGPUAS::BUFFER_RESOURCE ||
+      AS == AMDGPUAS::BUFFER_STRIDED_POINTER)
+    return SIAtomicAddrSpace::GLOBAL;
+
+  // Constant addrspaces map to OTHER because there is no point in atomic
----------------
ssahasra wrote:

> Arguably, these waits are unnecessary since the accessed memory is not supposed to change (which means there is not much sense in doing a volatile load in the first place).

Not sure how we model `volatile` for AMDGPU, but in general, a `volatile` load can have unknown side-effects even if it appears to return the same constant value loaded from the same constant location.

https://github.com/llvm/llvm-project/pull/231854